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PH2530AL Datasheet

N-channel TrenchMOS logic level FET

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PH2530AL
N-channel TrenchMOS logic level FET
Rev. 05 — 14 January 2010
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
computing and consumer applications.
1.2 Features and benefits
„ High efficiency due to low switching
and conduction losses
„ Suitable for logic level gate drive
sources
1.3 Applications
„ Consumer applications
„ Desktop Voltage Regulator Module
(VRM)
„ Notebook Voltage Regulator Module
(VRM)
1.4 Quick reference data
Table 1. Quick reference
Symbol Parameter
Conditions
Min Typ Max Unit
VDS drain-source voltage Tj 25 °C; Tj 175 °C
- - 30 V
ID drain current
Tmb = 25 °C; VGS = 10 V;
[1] -
-
100 A
see Figure 1
Ptot total power
dissipation
Tmb = 25 °C; see Figure 2
- - 88 W
Dynamic characteristics
QGD
QG(tot)
gate-drain charge
total gate charge
VGS = 4.5 V; ID = 10 A;
VDS = 12 V; see Figure 14
and 15
- 6.5 - nC
- 27 - nC
Static characteristics
RDSon drain-source
on-state resistance
VGS = 10 V; ID = 15 A;
Tj = 25 °C
- 1.79 2.4 m
[1] Continuous current is limited by package.


NXP Semiconductors Electronic Components Datasheet

PH2530AL Datasheet

N-channel TrenchMOS logic level FET

No Preview Available !

NXP Semiconductors
PH2530AL
N-channel TrenchMOS logic level FET
2. Pinning information
Table 2. Pinning information
Pin Symbol Description
1S
source
2S
source
3S
source
4G
gate
mb D
mounting base; connected to
drain
3. Ordering information
Simplified outline
mb
1234
SOT669 (LFPAK)
Graphic symbol
D
G
mbb076 S
Table 3. Ordering information
Type number
Package
Name
Description
PH2530AL
LFPAK
plastic single-ended surface-mounted package (LFPAK); 4 leads
4. Limiting values
Version
SOT669
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
VDGR
VGS
ID
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
IDM peak drain current
Ptot total power dissipation
Tstg storage temperature
Tj junction temperature
Source-drain diode
Conditions
Tj 25 °C; Tj 175 °C
Tj 25 °C; Tj 175 °C; RGS = 20 k
VGS = 10 V; Tmb = 100 °C; see Figure 1
VGS = 10 V; Tmb = 25 °C; see Figure 1
tp 10 µs; pulsed; Tmb = 25 °C; see Figure 3
Tmb = 25 °C; see Figure 2
[1]
[1]
IS source current
ISM peak source current
Avalanche ruggedness
EDS(AL)S
non-repetitive
drain-source avalanche
energy
Tmb = 25 °C;
tp 10 µs; pulsed; Tmb = 25 °C
VGS = 10 V; Tj(init) = 25 °C; ID = 100 A; Vsup 30 V;
RGS = 50 ; unclamped
[1]
[1] Continuous current is limited by package.
Min Max Unit
- 30 V
- 30 V
-20 20
V
- 100 A
- 100 A
- 580 A
- 88 W
-55 175 °C
-55 175 °C
- 100 A
- 580 A
- 103 mJ
PH2530AL_5
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 05 — 14 January 2010
© NXP B.V. 2010. All rights reserved.
2 of 14


Part Number PH2530AL
Description N-channel TrenchMOS logic level FET
Maker NXP Semiconductors
Total Page 14 Pages
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