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PH9030L Datasheet

N-channel TrenchMOS logic level FET

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PH9030L
N-channel TrenchMOS logic level FET
Rev. 01 — 29 July 2008
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
computing, communications, consumer and industrial applications only.
1.2 Features and benefits
„ High efficiency due to low switching
and conduction losses
„ Suitable for logic level gate drive
sources
1.3 Applications
„ DC-to-DC convertors
„ Notebook computers
„ Portable equipment
„ Switched-mode power supplies
1.4 Quick reference data
Table 1. Quick reference
Symbol
VDS
ID
Parameter
drain-source voltage
drain current
Conditions
25 °C Tj 150 °C
Tmb = 25 °C; VGS = 10 V;
see Figure 1; see Figure 3
Ptot total power
dissipation
Tmb = 25 °C; see Figure 2
Dynamic characteristics
QGD
gate-drain charge VGS = 4.5 V; ID = 10 A;
VDS = 12 V; see Figure 10;
see Figure 11
Static characteristics
RDSon
drain-source
on-state resistance
VGS = 10 V; ID = 25 A;
Tj = 25 °C; see Figure 8; see
Figure 9
Min Typ Max Unit
- - 30 V
- - 63 A
- - 62.5 W
- 3.2 - nC
- 7 9 m
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NXP Semiconductors Electronic Components Datasheet

PH9030L Datasheet

N-channel TrenchMOS logic level FET

No Preview Available !

NXP Semiconductors
PH9030L
N-channel TrenchMOS logic level FET
2. Pinning information
Table 2. Pinning information
Pin Symbol Description
1,2,3 S
source
4G
gate
mb D
mounting base; connected to
drain
3. Ordering information
Simplified outline
mb
1234
SOT669
(LFPAK)
Graphic symbol
D
G
mbb076 S
Table 3. Ordering information
Type number
Package
Name
PH9030L
LFPAK
4. Limiting values
Description
Version
Plastic single-ended surface-mounted package (LFPAK); SOT669
4 leads
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
VDGR
VGS
ID
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
IDM peak drain current
Conditions
25 °C Tj 150 °C
25 °C Tj 150 °C; RGS = 20 k
VGS = 10 V; Tj = 100 °C; see Figure 1
VGS = 10 V; Tmb = 25 °C; see Figure 1;
see Figure 3
tp 10 µs; pulsed; Tmb = 25 °C; see
Figure 3
Ptot total power dissipation
Tstg storage temperature
Tj junction temperature
Source-drain diode
Tmb = 25 °C; see Figure 2
IS source current
w w w I.SDM a t a S h e peetak4 sUou.rceocmurrent
Avalanche Ruggedness
Tmb = 25 °C
tp 10 µs; pulsed; Tmb = 25 °C
EDS(AL)S
non-repetitive drain-source
avalanche energy
VGS = 10 V; Tj(init) = 25 °C; ID = 33 A;
Vsup 30 V; unclamped; tp = 0.08 ms;
RGS = 50
Min Max
- 30
- 30
-20 20
- 39
- 63
Unit
V
V
V
A
A
- 214 A
- 62.5 W
-55 150 °C
-55 150 °C
- 52 A
- 208 A
- 53 mJ
PH9030L_1
Product data sheet
Rev. 01 — 29 July 2008
© NXP B.V. 2008. All rights reserved.
2 of 12


Part Number PH9030L
Description N-channel TrenchMOS logic level FET
Maker NXP Semiconductors
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PH9030L Datasheet PDF






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