PML340SN Datasheet | NXP Semiconductors

description Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a surface-mounted plastic package using Trench MOS technology. 1.2 Features I Standard level threshold I Very low thermal impedance I Low profile and small footprint I Low on-state resistance 1.3 Applications I Primary side switching I DC-to-DC converters 1.4 Quick reference data I VDS ≤ 220 V I RDSon ≤ 386 mΩ I ID ≤ 7.3 A I QGD = 4.25 n C (typ) 2. Pinning information Table 1. Pin 1, 2, 3 4 5, 6, 7, 8 Pinning Description source (S) gate (G) drain (D) Simplified outline 8 7 6 5 Symbol 1 2 3 4 Transparent top view mbb076 SOT873-1 (HVSON8) Philips Semiconductors N-channel Trench MOS standard level FET 3. Ordering information Table 2. Ordering information Package Name PML340SN HVSON8 Description Version plastic thermal enhanced very thin small outline package; no leads; SOT873-1 8 terminals; body 3.3 × 3.3 × 0.85 mm Type number 4. Limiting values Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VGS ID IDM Ptot Tstg Tj IS ISM drain-source voltage gate-source voltage drain current peak drain current total power dissipation storage temperature junction temperature source current peak source current Tmb = 25 °C Tmb = 25 °C; pulsed; tp ≤ 10 µs unclamped inductive load; ID = 3.5 A; tp = 0.05 ms; VDS ≤ 220 V; RGS = 50 Ω; VGS = 10 V; starting at Tj = 25 °C Tmb = 25 °C; VGS = 10 V; see Figure 2 and 3 Tmb = 100 °C; VGS = 10 V; see Figure 2 Tmb = 25 °C; pulsed; tp ≤ 10 µs; see Figure 3 Tmb = 25 °C; see Figure 1 Conditions 25 °C ≤ Tj ≤ 150 °C Min - 55 - 55 Max 220 ±20 7.3 4.4 14 50 +150 +150 7.6 14 22 Unit V V A A A W °C °C A A m J Source-drain diode Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy PML340SN_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 - 24 August 2006 2 of 12 Philips Semiconductors N-channel Trench MOS...