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PSMN102-200Y Datasheet

N-channel TrenchMOS SiliconMAX standard level FET

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PSMN102-200Y
N-channel TrenchMOS SiliconMAX standard level FET
Rev. 03 — 16 March 2011
Product data sheet
1. Product profile
1.1 General description
SiliconMAX standard level N-channel enhancement mode Field-Effect Transistor (FET) in
a plastic package using TrenchMOS technology. This product is designed and qualified for
use in computing, communications, consumer and industrial applications only.
1.2 Features and benefits
Higher operating power due to low
thermal resistance
Suitable for high frequency
applications due to fast switching
characteristics
1.3 Applications
Class D amplifier
DC-to-DC converters
Motion control
Switched-mode power supplies
1.4 Quick reference data
Table 1. Quick reference data
Symbol
VDS
Parameter
drain-source
voltage
Conditions
Tj 25 °C; Tj 150 °C
ID
drain current
Tmb = 25 °C; VGS = 10 V;
see Figure 1; see Figure 3
Ptot
total power
Tmb = 25 °C; see Figure 2
dissipation
Static characteristics
RDSon
drain-source
on-state
resistance
VGS = 10 V; ID = 12 A;
Tj = 25 °C; see Figure 9;
see Figure 10
Dynamic characteristics
QGD
gate-drain charge VGS = 10 V; ID = 12 A;
VDS = 100 V; see Figure 11;
see Figure 12
Min Typ Max Unit
- - 200 V
- - 21.5 A
- - 113 W
- 86 102 m
- 10.1 - nC


NXP Semiconductors Electronic Components Datasheet

PSMN102-200Y Datasheet

N-channel TrenchMOS SiliconMAX standard level FET

No Preview Available !

NXP Semiconductors
PSMN102-200Y
N-channel TrenchMOS SiliconMAX standard level FET
2. Pinning information
Table 2.
Pin
1
2
3
4
mb
Pinning information
Symbol Description
S source
S source
S source
G gate
D mounting base; connected to
drain
Simplified outline
mb
1234
SOT669 (LFPAK)
3. Ordering information
Graphic symbol
D
G
mbb076 S
Table 3. Ordering information
Type number
Package
Name
PSMN102-200Y
LFPAK
4. Limiting values
Description
Version
plastic single-ended surface-mounted package (LFPAK); 4 leads SOT669
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
VDGR
VGS
ID
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
Conditions
Tj 25 °C; Tj 150 °C
Tj 25 °C; Tj 150 °C; RGS = 20 k
VGS = 10 V; Tmb = 25 °C; see Figure 1;
see Figure 3
IDM peak drain current
VGS = 10 V; Tmb = 100 °C; see Figure 1
pulsed; tp 10 µs; Tmb = 25 °C;
see Figure 3
Ptot total power dissipation
Tstg storage temperature
Tj junction temperature
Source-drain diode
Tmb = 25 °C; see Figure 2
IS source current
ISM peak source current
Avalanche ruggedness
Tmb = 25 °C
pulsed; tp 10 µs; Tmb = 25 °C
EDS(AL)S
non-repetitive drain-source
avalanche energy
VGS = 10 V; Tj(init) = 25 °C; ID = 10.8 A;
Vsup 200 V; unclamped; tp = 0.14 ms;
RGS = 50
Min Max Unit
- 200 V
- 200 V
-20 20 V
- 21.5 A
- 13.6 A
- 65 A
- 113 W
-55 150 °C
-55 150 °C
- 52 A
- 208 A
- 202 mJ
PSMN102-200Y
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 16 March 2011
© NXP B.V. 2011. All rights reserved.
2 of 13


Part Number PSMN102-200Y
Description N-channel TrenchMOS SiliconMAX standard level FET
Maker NXP Semiconductors
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