UM10601 Datasheet | NXP Semiconductors

Description Preliminary LPC800 user manual R A FT D R R A F D R A FT A FT A FT D R A D FT D R A http://..net/ Contact information For more information, please visit: http://.nxp. For sales office addresses, please send an email to: salesaddresses@nxp. UM10601 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Preliminary user manual Rev. 1.0 - 7 November 2012 2 of 313 datasheet pdf - http://..net/ D R A FT D R A FT D R A FT D R A FT D R A FT Rev. 1.0 - 7 November 2012 Chapter 1: LPC800 Introductory information Preliminary user manual D D R R A A FT FT D D R A FT D D R A FT D R A FT D R A R A FT R A FT D R A FT D R A F R A FT D A FT R 1.1 Introduction The LPC800 are an ARM Cortex-M0+ based, low-cost 32-bit MCU family operating at CPU frequencies of up to 30 MHz. The UM10601 support up to 16 k B of flash memory and 4 k B of SRAM. The peripheral plement of the UM10601 includes a CRC engine, one I2C-bus interface, up to three USARTs, up to two SPI interfaces, one multi-rate timer, self wake-up timer, and state-configurable timer, one parator, function-configurable I/O ports through a switch matrix, an input pattern match engine, and up to 18 general-purpose I/O pins. D R A FT D 1.2 Features -...