Y Y Y Y Y TRI-STATE outputs for data bus applications Buffered inputs minimize loading Address decoding on-chip Diode clamped inputs minimize ringing Available in SOIC (.

Buffered inputs minimize loading Address decoding on-chip Diode clamped inputs minimize ringing Available in SOIC (300 m.

The ’F189 is a high-speed 64-bit RAM organized as a 16word by 4-bit array Address inputs are buffered to minimize loading and are fully decoded on-chip The outputs are TRISTATE and are in the high impedance state whenever the Chip Select (CS) input i.

74F1804

74F1805

74F1808

74F181

74F182

74F1832

74F189A

74F10

74F1056

74F1071

74F109

74F11

74F112