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National Semiconductor Electronic Components Datasheet

74F821 Datasheet

10-Bit D-Type Flip-Flop

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December 1994
54F 74F821
10-Bit D-Type Flip-Flop
General Description
The ’F821 is a 10-bit D-type flip-flop with TRI-STATE true
outputs arranged in a broadside pinout The ’F821 is func-
tionally and pin compatible with the AMD’s Am29821
Features
Y TRI-STATE Outputs
Y Direct replacement for AMD’s Am29821
Commercial
74F821SPC
74F821SC (Note 1)
Military
54F821SDM (Note 2)
54F821FM (Note 2)
54F821LM (Note 2)
Package
Number
N24C
J24F
M24B
W24C
E28A
Package Description
24-Lead (0 300 Wide) Molded Dual-In-Line
24-Lead (0 300 Wide) Ceramic Dual-In-Line
24-Lead (0 300 Wide) Molded Small Outline JEDEC
24-Lead Cerpack
24-Lead Ceramic Leadless Chip Carrier Type C
Note 1 Devices also available in 13 reel Use suffix e SCX
Note 2 Military grade device with environmental and burn-in processing Use suffix e SDMQB FMQB and LMQB
Logic Symbols
Connection Diagrams
Pin Assignment
for DIP SOIC and Flatpak
Pin Assignment
for LCC
TL F 9595–1
IEEE IEC
TL F 9595 – 2
TL F 9595 – 3
TL F 9595–5
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 9595
RRD-B30M75 Printed in U S A


National Semiconductor Electronic Components Datasheet

74F821 Datasheet

10-Bit D-Type Flip-Flop

No Preview Available !

Unit Loading Fan Out
Pin Names
D0 – D9
OE
CP
O0 – O9
Description
Data Inputs
Output Enable
TRI-STATE Input
Clock Input
TRI-STATE Outputs
UL
HIGH LOW
10 10
10 10
10 10
150 40 (33 3)
54F 74F
Input IIH IIL
Output IOH IOL
20 mA b0 6 mA
20 mA b0 6 mA
20 mA b0 6 mA
b3 0 mA 24 mA (20 mA)
Functional Description
The ’F821 consists of ten D-type edge-triggered flip-flops
This device has TRI-STATE true outputs for bus systems
organized in a broadside pinning The buffered Clock (CP)
and buffered Output Enable (OE) are common to all flip-
flops The flip-flops will store the state of their individual D
inputs that meet the setup and hold times requirements on
the LOW-to-HIGH CP transition With the OE LOW the con-
tent of the flip-flops are available at the outputs When the
OE is HIGH the outputs go to the high impedance state
Operation of the OE input does not affect the state of the
flip-flops
Logic Diagram
Function Table
Inputs
Internal Output
OE CP D
Q
O
Function
H HX
H LX
NC
NC
Z Hold
Z Hold
H LL
H
Z Load
H LH
L
Z Load
L LL
H
L Data Available
L LH
L
H Data Available
L H X NC
NC No Change in Data
L L X NC
NC No Change in Data
L e LOW Voltage Level
H e HIGH Voltage Level
X e Immaterial
Z e High Impedance
L e LOW-to-HIGH Transition
NC e No Change
TL F 9595 – 4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
2


Part Number 74F821
Description 10-Bit D-Type Flip-Flop
Maker National
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74F821 Datasheet PDF






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