100310 Overview
The 100310 is a low skew a·bit differential clock driver which is designed to select between two separate differen· tial clock inputs. The low output to output skew « 50 ps) is maintained for either clock input. A LOW on the select pin (SEL) selects CLKINA.
100310 Key Features
- Low output to output skew
- Differential inputs and outputs
- Allows multiplexing between two clock inputs
- Voltage pensated operating range: -4.2V to -5.7V
- t>--vss
100310 Applications
- Low output to output skew