5497 Datasheet - National Semiconductor

Synchronous Modulo-64 Bit Rate Multiplier

5497 Features

* 010101 0101 5

5497 General Description

The ’97 contains a synchronous 6-stage binary counter and six decoding gates that serve to gate the clock through to the output at a sub-multiple of the input frequency The output pulse rate relative to the clock frequency is determined by signals applied to the Select (S0 *S5) inputs Both tr.

5497 Datasheet (149.58 KB)

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5497

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National Semiconductor

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149.58 KB

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Synchronous modulo-64 bit rate multiplier.

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5497 Synchronous Modulo-64 Bit Rate Multiplier National Semiconductor

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