dual jk positive edge-triggered flip-flop.
n n n n ICC reduced by 50% Outputs source/sink 24 mA ’ACT109 has TTL-compatible inputs Standard Military Drawing (SMD) — ’AC109: 5962-89551 — ’ACT109: 5962-88534
Logic S.
The ’AC/’ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop (refer to ’AC/’ACT.
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