Download 54F410 Datasheet PDF
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54F410 Key Features

  • D3 CS OE WE CP
  • D3) is written into the memory location selected by the address inputs (A0
  • A3) If the input data changes while WE CS and CP are LOW the contents of the selected memory location follow these chang
  • A3) are edge-triggered into the Output Register
  • Q3) are in a high impedance or OFF state when OE is LOW the outputs are determined by the state of the Output Register

54F410 Description

The ’F410 is a register-oriented high-speed 64-bit Read Write Memory organized as 16-words by 4-bits An edgetriggered 4-bit output register allows new input data to be written while previous data is held TRI-STATE outputs are provided for maximum versatility The ’F410 is fully patible with all TTL families.