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National Semiconductor Electronic Components Datasheet

54F534 Datasheet

Octal D-Type Flip-Flop

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54F534 pdf
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May 1995
54F 74F534
Octal D-Type Flip-Flop with TRI-STATE Outputs
General Description
The ’F534 is a high speed low-power octal D-type flip-flop
featuring separate D-type inputs for each flip-flop and
TRI-STATE outputs for bus-oriented applications A buff-
ered Clock (CP) and Output Enable (OE) are common to all
flip-flops The ’F534 is the same as the ’F374 except that
the outputs are inverted
Features
Y Edge-triggered D-type inputs
Y Buffered positive edge-triggered clock
Y TRI-STATE outputs for bus-oriented applications
Y Guaranteed 4000V minimum ESD protection
Commercial
Military
Package
Number
Package Description
74F534PC
N20A
20-Lead (0 300 Wide) Molded Dual-In-Line
54F534DM (Note 2)
J20A
20-Lead Ceramic Dual-In-Line
74F534SC (Note 1)
M20B
20-Lead (0 300 Wide) Molded Small Outline JEDEC
74F534SJ (Note 1)
M20D
20-Lead (0 300 Wide) Molded Small Outline EIAJ
54F534FM (Note 2)
W20A
20-Lead Cerpack
54F534LM (Note 2)
E20A
20-Lead Ceramic Leadless Chip Carrier Type C
Note 1 Devices also available in 13 reel Use suffix e SCX and SJX
Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB
Logic Symbols
IEEE IEC
TL F 9549 – 1
Unit Loading Fan Out
54F 74F
Pin Names
Description
UL
HIGH LOW
Input IIH IIL
Output IOH IOL
D0 – D7
CP
OE
O0 – O7
Data Inputs
10 10
20 mA b0 6 mA
Clock Pulse Input (Active Rising Edge)
10 10
20 mA b0 6 mA
TRI-STATE Output Enable Input (Active LOW) 1 0 1 0
20 mA b0 6 mA
Complementary TRI-STATE Outputs
150 40(33 3) b3 mA 24 mA (20 mA)
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 9549
TL F 9549 – 5
RRD-B30M75 Printed in U S A


National Semiconductor Electronic Components Datasheet

54F534 Datasheet

Octal D-Type Flip-Flop

No Preview Available !

54F534 pdf
Connection Diagrams
Pin Assignment for
DIP SOIC and Flatpak
Pin Assignment
for LCC
TL F 9549–2
Functional Description
The ’F534 consists of eight edge-triggered flip-flops with in-
dividual D-type inputs and TRI-STATE complementary out-
puts The buffered clock and buffered Output Enable are
common to all flip-flops The eight flip-flops will store the
state of their individual D inputs that meet the setup and
hold times requirements on the LOW-to-HIGH clock (CP)
transition With the Output Enable (OE) LOW the contents
of the eight flip-flops are available at the outputs When the
OE is HIGH the outputs go to the high impedance state
Operation of the OE input does not affect the state of the
flip-flops
Logic Diagram
Function Table
Inputs
CP OE D
LLH
LL L
L LX
X HX
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
L e LOW-to-HIGH Clock Transition
Z e High Impedance
O0 e Value stored from previous clock cycle
TL F 9549 – 3
Output
O
L
H
O0
Z
TL F 9549 – 4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
2


Part Number 54F534
Description Octal D-Type Flip-Flop
Maker National Semiconductor
Total Page 8 Pages
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