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74ACTQ10 Datasheet

Quiet Series Triple 3-Input NAND Gate

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March 1993
54ACTQ 74ACTQ10
Quiet Series Triple 3-Input NAND Gate
General Description
The ’ACTQ10 contains three 3-input NAND gates and uti-
lizes NSC Quiet Series technology to guarantee quiet output
switching and improved dynamic threshold performance
FACT Quiet SeriesTM features GTOTM output control and
undershoot corrector in addition to a split ground bus for
superior ACMOS performance
Features
Y ICC reduced by 50%
Y Guaranteed simultaneous switching noise level and
dynamic threshold performance
Y Improved latch-up immunity
Y Minimum 2 kV ESD protection
Y Outputs source sink 24 mA
Y ’ACTQ 10 has TTL-compatible inputs
Logic Symbol
IEEE IEC
Connection Diagrams
Pin Assignment
for DIP Flatpak and SOIC
Pin Assignment
for LCC
Pin Names
An Bn Cn
On
TL F 10892 – 1
Description
Inputs
Outputs
TL F 10892 – 2
TL F 10892 – 3
FACTTM FACT Quiet SeriesTM and GTOTM are trademarks of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 10892
RRD-B30M75 Printed in U S A


National Semiconductor Electronic Components Datasheet

74ACTQ10 Datasheet

Quiet Series Triple 3-Input NAND Gate

No Preview Available !

Absolute Maximum Ratings (Note 1)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage (VCC)
b0 5V to a7 0V
DC Input Diode Current (IIK)
VI e b0 5V
VI e VCC a 0 5V
b20 mA
a20 mA
DC Input Voltage (VI)
b0 5V to VCC a 0 5V
DC Output Diode Current (IOK)
VO e b0 5V
VO e VCC a 0 5V
b20 mA
a20 mA
DC Output Voltage (VO)
b0 5V to VCC a 0 5V
DC Output Source
or Sink Current (IO)
g50 mA
DC VCC or Ground Current
per Output Pin (ICC or IGND)
g50 mA
Storage Temperature (TSTG)
b65 C to a150 C
DC Latch-Up Source or Sink Current
g300 mA
Junction Temperature (TJ)
CDIP
PDIP
175 C
140 C
Note 1 Absolute maximum ratings are values beyond which damage to the
device may occur The databook specifications should be met without ex-
ception to ensure that the system design is reliable over its power supply
temperature and output input loading variables National does not recom-
mend operation outside of databook specifications
Recommended Operating
Conditions (Note 2)
Supply Voltage (VCC)
’ACTQ
4 5V to 5 5V
Input Voltage (VI)
Output Voltage (VO)
Operating Temperature (TA)
74ACTQ
54ACTQ
0V to VCC
0V to VCC
b40 C to a85 C
b55 C to a125 C
Minimum Input Edge Rate (dV dt)
’ACTQ Devices
125 mV ns
VIN from 0 8V to 2 0V
VCC 4 5V 5 5V
Note 2 All commercial packaging is not recommended for applications re-
quiring greater than 2000 temperature cycles from b40 C to a125 C
DC Characteristics for ’ACTQ Family Devices
Symbol
Parameter
VCC
(V)
VIH Minimum High Level 4 5
Input Voltage
55
VIL Maximum Low Level 4 5
Input Voltage
55
VOH Minimum High Level 4 5
Output Voltage
55
74ACTQ
TA e a25 C
Typ
15
15
15
15
4 49
5 49
20
20
08
08
44
54
54ACTQ
74ACTQ
TA e
TA e
b55 C to a125 C b40 C to a85 C
Guaranteed Limits
20 20
20 20
08 08
08 08
44 44
54 54
4 5 3 86
5 5 4 86
VOL Maximum Low Level 4 5 0 001 0 1
Output Voltage
5 5 0 001 0 1
3 70
4 70
01
01
3 76
4 76
01
01
4 5 0 36
5 5 0 36
IIN Maximum Input 5 5
Leakage Current
g0 1
All outputs loaded thresholds on input associated with output under test
0 50
0 50
g1 0
0 44
0 44
g1 0
Units
V
V
V
V
V
V
mA
Conditions
VOUT e 0 1V
or VCC b 0 1V
VOUT e 0 1V
or VCC b 0 1V
IOUT e b50 mA
VIN e VIL or VIH
IOH
b24 mA
b24 mA
IOUT e 50 mA
VIN e VIL or VIH
IOL
24 mA
24 mA
VI e VCC GND
2


Part Number 74ACTQ10
Description Quiet Series Triple 3-Input NAND Gate
Maker National Semiconductor
Total Page 8 Pages
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