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National Semiconductor Electronic Components Datasheet

74ACTQ16373 Datasheet

16-Bit Transparent Latch

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March 1993
54ACTQ 74ACTQ16373
16-Bit Transparent Latch with TRI-STATE Outputs
General Description
The ’ACTQ16373 contains sixteen non-inverting latches
with TRI-STATE outputs and is intended for bus oriented
applications The device is byte controlled The flip-flops ap-
pear transparent to the data when the Latch Enable (LE) is
HIGH When LE is low the data that meets the setup time is
latched Data appears on the bus when the Output Enable
(OE) is LOW When OE is HIGH the outputs are in high Z
state The ’ACTQ16373 utilizes NSC Quiet Series technolo-
gy to guarantee quiet output switching and improved dy-
namic threshold performance FACT Quiet SeriesTM fea-
tures GTOTM output control for superior performance
Features
Y Utilizes NSC FACT Quiet Series technology
Y Guaranteed simultaneous switching noise level and
dynamic threshold performance
Y Guaranteed pin-to-pin output skew
Y Separate control logic for each byte
Y 16-bit version of the ’ACTQ373
Y Outputs source sink 24 mA
Y Additional specs for Multiple Output Switching
Y Output Loading specs for both 50 pF and 250 pF loads
Logic Symbol
Connection Diagram
Pin Assignment for SSOP
and CERPAK
TL F 10934 – 1
Pin Description
Pin Names
OEn
LEn
I0 – I15
O0 – O15
Description
Output Enable Input (Active Low)
Latch Enable Input
Inputs
Outputs
TRI-STATE is a registered trademark of National Semiconductor Corporation
FACTTM FACT Quiet SeriesTM and GTOTM are trademarks of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 10934
TL F 10934 – 2
RRD-B30M75 Printed in U S A


National Semiconductor Electronic Components Datasheet

74ACTQ16373 Datasheet

16-Bit Transparent Latch

No Preview Available !

Functional Description
The ’ACTQ16373 contains sixteen D-type latches with
TRI-STATE standard outputs The device is byte controlled
with each byte functioning identically but independent of
the other Control pins can be shorted together to obtain full
16-bit operation The following description applies to each
byte When the Latch Enable (LEn) input is HIGH data on
the Dn enters the latches In this condition the latches are
transparent i e a latch output will change states each time
its D input changes When LEn is LOW the latches store
information that was present on the D inputs a setup time
preceding the HIGH-to-LOW transition of LEn The
TRI-STATE standard outputs are controlled by the Output
Enable (OEn) input When OEn is LOW the standard out-
puts are in the 2-state mode When OEn is HIGH the stan-
dard outputs are in the high impedance mode but this does
not interfere with entering new data into the latches
Logic Diagrams
Truth Tables
Inputs
LE1 OE1
XH
HL
HL
LL
I0 – I7
X
L
H
X
Outputs
O0 – O7
Z
L
H
(Previous)
Inputs
Outputs
LE2 OE2 I8 – I15
O8 – O15
XH
HL
HL
LL
XZ
LL
HH
X (Previous)
H e High Voltage Level
L e Low Voltage Level
X e Immaterial
Z e High Impedance
Previous e previous output prior to HIGH to LOW transition of LE
TL F 10934 – 3
TL F 10934 – 4
2


Part Number 74ACTQ16373
Description 16-Bit Transparent Latch
Maker National Semiconductor
Total Page 8 Pages
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