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National Semiconductor Electronic Components Datasheet

74ACTQ543 Datasheet

Quiet Series Octal Registered Transceiver

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March 1993
74ACQ543  54ACTQ 74ACTQ543
Quiet Series Octal Registered Transceiver with
TRI-STATE Outputs
General Description
The ACQ ACTQ543 is a non-inverting octal transceiver
containing two sets of D-type registers for temporary stor-
age of data flowing in either direction Separate Latch En-
able and Output Enable inputs are provided for each regis-
ter to permit independent input and output control in either
direction of data flow
The ACQ ACTQ utilizes NSC Quiet Series technology to
guarantee quiet output switching and improved dynamic
threshold performance FACT Quiet SeriesTM features
GTOTM output control and undershoot corrector in addition
to a split ground bus for superior performance
Features
Y Guaranteed simultaneous switching noise level and
dynamic threshold performance
Y Guaranteed pin-to-pin skew AC performance
Y 8-bit octal latched transceiver
Y Separate controls for data flow in each direction
Y Back-to-back registers for storage
Y Outputs source sink 24 mA
Y 4 kV minimum ESD immunity
Y 300 mil slim PDIP SOIC
Y Standard Military Drawing (SMD)
54ACTQ543 5962-9219201
Logic Symbols
Connection Diagrams
Pin Assignment for
DIP SOIC QSOP and Flatpak
Pin Assignment
for LCC
TL F 10154 – 1
IEEE IEC
TL F 10154 – 2
TL F 10154 – 3
TL F 10154 – 4
FAST and TRI-STATE are registered trademarks of National Semiconductor Corporation
FACTTM FACT Quiet SeriesTM and GTOTM are trademarks of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 10154
RRD-B30M75 Printed in U S A


National Semiconductor Electronic Components Datasheet

74ACTQ543 Datasheet

Quiet Series Octal Registered Transceiver

No Preview Available !

Pin Names
OEAB
OEBA
CEAB
CEBA
LEAB
LEBA
A0 – A7
B0 – B7
Description
A-to-B Output Enable Input (Active LOW)
B-to-A Output Enable Input (Active LOW)
A-to-B Enable Input (Active LOW)
B-to-A Enable Input (Active LOW)
A-to-B Latch Enable Input (Active LOW)
B-to-A Latch Enable Input (Active LOW)
A-to-B Data Inputs or
B-to-A TRI-STATE Outputs
B-to-A Data Inputs or
A-to-B TRI-STATE Outputs
Functional Description
The ’ACQ ’ACTQ543 contains two sets of eight D-type
latches with separate input and output controls for each
set For data flow from A to B for example the A-to-B En-
able (CEAB) input must be LOW in order to enter data from
A0 – A7 or take data from B0 – B7 as indicated in the Data I
O Control Table With CEAB LOW a LOW signal on the A-
to-B Latch Enable (LEAB) input makes the A-to-B latches
transparent a subsequent LOW-to-HIGH transition of the
LEAB signal puts the A latches in the storage mode and
their outputs no longer change with the A inputs With CEAB
and OEAB both LOW the TRI-STATE B output buffers are
active and reflect the data present at the output of the A
latches Control of data flow from B to A is similar but using
the CEBA LEBA and OEBA inputs
Logic Diagram
Data I O Control Table
Inputs
Latch Status Output Buffers
CEAB LEAB OEAB
HX X
Latched
XHX
Latched
L L X Transparent
XXH
LXL
High Z
High Z
Driving
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
A-to-B data flow shown B-to-A flow control
is the same except using CEBA LEBA and OEBA
TL F 10154 – 8
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
2


Part Number 74ACTQ543
Description Quiet Series Octal Registered Transceiver
Maker National Semiconductor
Total Page 12 Pages
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