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74C910 - MM74C910

Datasheet Summary

Description

The MM54C910 MM74C910 is a 64 word by 4-bit random access memory Inputs consist of six address lines four data input lines a WE and a ME line The six address lines are internally decoded to select one of the 64 word locations An internal address register latches the address information on the positi

Features

  • Y Supply voltage range Y High noise immunity Y TTL compatible fan out Y Input address register Y Low power consumption Y Fast access time Y TRI-STATE outputs Y High voltage inputs 3 0V to 5 5V 0 45VCC (typ ) 1 TTL load 250 nW package (typ ) (chip enabled or disabled) 250 ns (typ ) at 5 0V Logic Diagrams www. DataSheet4U. com Input Protection www. DataSheet4U. com u. comTRI-STATE is a registered trademark of National Semiconductor Corporation www. datasheet4C1995 National Semiconductor Corporatio.

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MM54C910 MM74C910 256 Bit TRI-STATE Random Access Read Write Memory September 1989 MM54C910 MM74C910 256 Bit TRI-STATE Random Access Read Write Memory General Description The MM54C910 MM74C910 is a 64 word by 4-bit random access memory Inputs consist of six address lines four data input lines a WE and a ME line The six address lines are internally decoded to select one of the 64 word locations An internal address register latches the address information on the positive to negative transition of ME The TRI-STATE outputs allow for easy memory expansion Address Operation Address inputs must be stable (tSA) prior to the positive to negative transition of ME and (tHA) after the positive to negative transition of ME The address register holds the information and stable address inputs are not
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