ADC12DL066 Key Features
- Choice of Binary or 2’s plement output format Single +3.3V Supply Operation Outputs 2.4V to 3.3V patible Pin patible wit
- Resolution DNL SNR (fIN = 10 MHz) SFDR (fIN = 10 MHz) Data Latency Power Consumption
- Operating
- Power Down Mode 12 Bits ±0.5 LSB (typ) 66 dB (typ) 81 dB (typ) 6 Clock Cycles 686 mW (typ) 75 mW (typ)
