dual complementary pair plus inverter.
Y Y
Wide supply voltage range High noise immunity
3 0V to 15V 0 45 VCC (typ )
Connection Diagram
Dual-In-Line Package
TL F 5943
– 1
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Note All.
All inputs are protected from static discharge by diode clamps to VDD and VSS For proper operation the voltages at all p.
The CD4007M CD4007C consists of three complementary pairs of N- and P-channel enhancement mode MOS transistors suitable for series shunt applications All inputs are protected from static discharge by diode clamps to VDD and VSS For proper operation t.
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