Datasheet Summary
CD4023M CD4023C Triple 3-Input NAND Gate CD4025M CD4025C Triple 3-Input NOR Gate
February 1988
CD4023M CD4023C Triple 3-Input NAND Gate CD4025M CD4025C Triple 3-Input NOR Gate
General Description
These triple gates are monolithic plementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors All inputs are protected against static discharge with diodes to VDD and VSS
Features
Wide supply voltage range High noise immunity 5V
- 10V parametric ratings Low power
3 0V to 15V 0 45 VDD (typ )
Connection Diagrams
Dual-In-Line Packages CD4023M CD4023C CD4025M CD4025C
TL F 5955
- 1
TL F 5955
- 2
Top View Order Number CD4023 or CD4025
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