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DM5426 - Quad 2-Input NAND Gates

Description

This device contains four independent gates each of which performs the logic NAND function The open-collector outputs require external pull-up resistors for proper logical operation Pull-Up Resistor Equations RMAX e VO (Min) b VOH N1 (IOH) a N2 (IIH) RMIN e VO (Max) b VOL IOL b N3 (IIL) Wher

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DM5426 DM7426 Quad 2-Input NAND Gates with High Voltage Open-Collector Outputs June 1989 DM5426 DM7426 Quad 2-Input NAND Gates with High Voltage Open-Collector Outputs General Description This device contains four independent gates each of which performs the logic NAND function The open-collector outputs require external pull-up resistors for proper logical operation Pull-Up Resistor Equations RMAX e VO (Min) b VOH N1 (IOH) a N2 (IIH) RMIN e VO (Max) b VOL IOL b N3 (IIL) Where N1 (IOH) e total maximum output high current for all outputs tied to pull-up resistor N2 (IIH) e total maximum input high current for all inputs tied to pull-up resistor N3 (IIL) e total maximum input low current for all inputs tied to pull-up resistor Connection Diagram Dual-In-Line Package Function
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