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National Semiconductor Electronic Components Datasheet

DM54LS169A Datasheet

Synchronous 4-Bit Up/Down Binary Counter

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DM54LS169A pdf
June 1989
54LS169 DM54LS169A DM74LS169A
Synchronous 4-Bit Up Down Binary Counter
General Description
This synchronous presettable counter features an internal
carry look-ahead for cascading in high-speed counting ap-
plications Synchronous operation is provided by having all
flip-flops clocked simultaneously so that the outputs all
change at the same time when so instructed by the count-
enable inputs and internal gating This mode of operation
helps eliminate the output counting spikes that are normally
associated with asynchronous (ripple clock) counters A
buffered clock input triggers the four master-slave flip-flops
on the rising edge of the clock waveform
This counter is fully programmable that is the outputs may
each be preset either high or low The load input circuitry
allows loading with the carry-enable output of cascaded
counters As loading is synchronous setting up a low level
at the load input disables the counter and causes the out-
puts to agree with the data inputs after the next clock pulse
The carry look-ahead circuitry permits cascading counters
for n-bit synchronous applications without additional gating
Both count-enable inputs (P and T) must be low to count
The direction of the count is determined by the level of the
up down input When the input is high the counter counts
up when low it counts down Input T is fed forward to en-
able the carry outputs The carry output thus enabled will
produce a low-level output pulse with a duration approxi-
mately equal to the high portion of the QA output when
counting up and approximately equal to the low portion of
the QA output when counting down This low-level overflow
carry pulse can be used to enable successively cascaded
stages Transitions at the enable P or T inputs are allowed
regardless of the level of the clock input All inputs are diode
clamped to minimize transmission-line effects thereby sim-
plifying system design
This counter features a fully independent clock circuit
Changes at control inputs (enable P enable T load up
down) which modify the operating mode have no effect
until clocking occurs The function of the counter (whether
enabled disabled loading or counting) will be dictated
solely by the conditions meeting the stable setup and hold
times
Features
Y Fully synchronous operation for counting and
programming
Y Internal look-ahead for fast counting
Y Carry output for n-bit cascading
Y Fully independent clock circuit
Y Alternate Military Aerospace device (54LS169) is
available Contact a National Semiconductor Sales
Office Distributor for specifications
Connection Diagram
Dual-In-Line Package
TL F 6401 – 1
Order Number 54LS169DMQB 54LS169FMQB 54LS169LMQB
DM54LS169AJ DM54LS169AW DM74LS169AM or DM74LS169AN
See NS Package Number E20A J16A M16A N16E or W16A
C1995 National Semiconductor Corporation TL F 6401
RRD-B30M105 Printed in U S A


National Semiconductor Electronic Components Datasheet

DM54LS169A Datasheet

Synchronous 4-Bit Up/Down Binary Counter

No Preview Available !

DM54LS169A pdf
Absolute Maximum Ratings (Note)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage
7V
Input Voltage
7V
Operating Free Air Temperature Range
DM54LS and 54LS
b55 C to a125 C
DM74LS
0 C to a70 C
Storage Temperature Range
b65 C to a150 C
Note The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaran-
teed The device should not be operated at these limits The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation
Recommended Operating Conditions
Symbol
Parameter
DM54LS169A
Min Nom Max
DM74LS169A
Min Nom Max
Units
VCC Supply Voltage
VIH High Level Input Voltage
VIL Low Level Input Voltage
IOH High Level Output Current
IOL Low Level Output Current
fCLK
Clock Frequency (Note 1)
Clock Frequency (Note 2)
45
5
5 5 4 75
5
5 25
V
22 V
07 08 V
b0 4
b0 4
mA
4 8 mA
0 25 0 25 MHz
0 20 0 20 MHz
tW Clock Pulse Width (Note 3)
tSU Setup Time
(Note 3)
Data
Enable
T or P
Load
25
20
20
25
25
20
20
25
ns
ns
U D 30
30
tH Hold Time (Note 3)
TA Free Air Operating Temperature
Note 1 CL e 15 pF RL e 2 kX TA e 25 C and VCC e 5V
Note 2 CL e 50 pF RL e 2 kX TA e 25 C and VCC e 5V
Note 3 TA e 25 C and VCC e 5V
0
b55
0
125 0
ns
70 C
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
(Note 4)
Max
VI
Input Clamp Voltage
VCC e Min II e b18 mA
b1 5
VOH
High Level Output
VCC e Min IOH e Max
DM54
25
34
Voltage
VIL e Max VIH e Min
DM74
27
34
VOL
Low Level Output
VCC e Min IOL e Max
DM54
Voltage
VIL e Max VIH e Min
DM74
0 25 0 4
0 35 0 5
IOL e 4 mA VCC e Min
DM74
II
Input Current Max
VCC e Max
Input Voltage
VI e 7V
Enable T
Others
0 25 0 4
02
01
IIH
High Level Input
VCC e Max
Current
VI e 2 7V
Enable T
Others
40
20
IIL
Low Level Input
VCC e Max
Current
VI e 0 4V
Enable T
Others
b0 8
b0 4
IOS Short Circuit
Output Current
VCC e Max
(Note 5)
DM54
DM74
b20
b20
b100
b100
ICC Supply Current
VCC e Max (Note 6)
20 34
Note 4 All typicals are at VCC e 5V and TA e 25 C
Note 5 Not more than one output should be shorted at a time and the duration should not exceed one second
Note 6 ICC is measured after a momentary 4 5V then ground is applied to the CLOCK with all other inputs grounded and all the outputs open
2
Units
V
V
V
mA
mA
mA
mA
mA


Part Number DM54LS169A
Description Synchronous 4-Bit Up/Down Binary Counter
Maker National Semiconductor
Total Page 8 Pages
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