* Y Counts 8-4-2-1 BCD or binary Y Single down up count control line Y Count enable control input Y Ripple clock output for cascading Y Asynchronously presettable with load control Y Parallel outputs Y Cascadable for n-bit applications Y Average propagation delay 20 ns Y Typical clock frequency 25 MHz
DM54LS191 Datasheet (125.07 KB)
DM54LS191
National Semiconductor
125.07 KB
Synchronous 4-bit up/down counters.
DM54LS190 DM74LS190 DM54LS191 DM74LS191 Synchronous 4-Bit Up Down Counters with Mode Control May 1989 DM54LS190 DM74LS190 DM54LS191 DM74LS191 Synchr.
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