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DM74LS175 - Hex/Quad D Flip-Flops

Download the DM74LS175 datasheet PDF. This datasheet also covers the DM74LS174 variant, as both devices belong to the same hex/quad d flip-flops family and are provided as variant models within a single manufacturer datasheet.

Description

These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic All have a direct clear input and the quad (175) versions feature complementary outputs from each flip-flop Information at the D inputs meeting the setup time requirements is transferred to the Q outpu

Features

  • Y Y Y Y Y Y Y Y LS174 contains six flip-flops with single-rail outputs LS175 contains four flip-flops with double-rail outputs Buffered clock and direct clear inputs Individual data input to each flip-flop.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (DM74LS174_NationalSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
DM74LS175 Hex/Quad D-Type Flip-Flops Fairchild Semiconductor
DM74LS174 Hex/Quad D-Type Flip-Flops Fairchild Semiconductor
DM74LS10 Triple 3-Input NAND Gate Fairchild Semiconductor
DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flop Fairchild Semiconductor
DM74LS11 Triple 3-Input AND Gate Fairchild Semiconductor

Other Datasheets by National Semiconductor (Texas Instruments)

Part Number Description
DM74LS173A 4-Bit D-Type Register
DM74LS174 Hex/Quad D Flip-Flops
DM74LS10 Triple 3-Input NAND Gates
DM74LS107A Dual Negative-Edge- Triggered Master-Slave J-K Flip-Flops
DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flops

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
54LS174 DM54LS174 DM74LS174 54LS175 DM54LS175 DM74LS175 Hex Quad D Flip-Flops with Clear June 1989 54LS174 DM54LS174 DM74LS174 54LS175 DM54LS175 DM74LS175 Hex Quad D Flip-Flops with Clear General Description These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic All have a direct clear input and the quad (175) versions feature complementary outputs from each flip-flop Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse When the clock input is at either the high or low level the D input signal has no effect at the output Feat
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