Datasheet4U Logo Datasheet4U.com

DM7838 - quad TRI-STATE transceivers

Description

~

Features

  • The DM7838/DM8838 are quad high speed drivers!' receivers designed for use in bus organized datatransmission systems interconnected by termi.
  • nated 120n Impedance lines. The external termi.
  • nation is intended to be a 180n resistor from the bus to the +5V logic supply together with a 390n resistor from the bus to ground. The bus can be terminated at one or both ends. Low bus pin cur.
  • rent allows up to 27 driver/receiver pairs to utilize a common bus. The bus loading is unchanged whe.

📥 Download Datasheet

Datasheet preview – DM7838

📁 Similar Datasheet

  • DM7820 - Versatile High Speed Digital I/O (RTD)
  • DM7820HR - Versatile High Speed Digital I/O (RTD)
  • DM78L05 - LOW CURRENT POSITIVE VOLTAGE REGULATOR (Dc Components)
  • DM78L05A - LOW CURRENT POSITIVE VOLTAGE REGULATOR (Dc Components)
  • DM78L06 - LOW CURRENT POSITIVE VOLTAGE REGULATOR (Dc Components)
  • DM78L06A - LOW CURRENT POSITIVE VOLTAGE REGULATOR (Dc Components)
  • DM78L08 - LOW CURRENT POSITIVE VOLTAGE REGULATOR (Dc Components)
  • DM78L08A - LOW CURRENT POSITIVE VOLTAGE REGULATOR (Dc Components)
  • DM78L09 - LOW CURRENT POSITIVE VOLTAGE REGULATOR (Dc Components)
  • DM78L09A - LOW CURRENT POSITIVE VOLTAGE REGULATOR (Dc Components)
Other Datasheets by National Semiconductor
  • DM7830 - dual differential line driver
  • DM7831 - Line Driver
  • DM7832 - Line Driver
  • DM7833 - quad TRI-STATE transceivers
  • DM7834 - quad TRI-STATE transceivers
  • DM7835 - quad TRI-STATE transceivers
  • DM7836 - quad NOR unified bus receiver
  • DM7837 - hex unified bus receiver

Full PDF Text Transcription

Click to expand full text
Line Drivers IReceivers DM7838/DM8838 quad unified"bus transceiver general description ~·features The DM7838/DM8838 are quad high speed drivers!' receivers designed for use in bus organized datatransmission systems interconnected by termi· nated 120n Impedance lines. The external termi· nation is intended to be a 180n resistor from the bus to the +5V logic supply together with a 390n resistor from the bus to ground. The bus can be terminated at one or both ends. Low bus pin cur· rent allows up to 27 driver/receiver pairs to utilize a common bus. The bus loading is unchanged when Vee = OV. The receivers Incorporate hystere· SIS to greatly enhance bus nOise immunity. One two·lnput NOR gate is included tq disable all drivers In a package simultaneously.
Published: |