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National Semiconductor Electronic Components Datasheet

DS91C176 Datasheet

(DS91C176 / DS91D176) Multipoint-LVDS (M-LVDS) Transceivers

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DS91C176 pdf
February 2007
DS91D176/DS91C176
Multipoint-LVDS (M-LVDS) Transceivers
General Description
The DS91C176 and DS91D176 are high-speed M-LVDS dif-
ferential transceivers designed for multipoint applications with
multiple drivers or receivers. Multipoint LVDS (M-LVDS) is a
new bus interface standard (TIA/EIA-899) based on LVDS but
including several enhancements to improve multipoint per-
formance. M-LVDS devices have superior drive capability
and can support up to 32 loads. Along with increased drive,
M-LVDS devices are required to have a controlled edge rate
to minimize reflections and EMI. The 1 nSec minimum edge
rate is tolerant of stub lengths up to 2 inches in length. M-
LVDS devices also have a very large common mode range
for additional noise margin in heavily loaded and noisy back-
plane environments.
The DS91C176/DS91D176 are half-duplex transceivers that
accept LVTTL/LVCMOS signals at the driver inputs and con-
vert them to differential M-LVDS signal levels. The receiver
inputs accept low voltage differential signals (LVDS, B-LVDS,
M-LVDS, LV-PECL) and convert them to 3V LVCMOS sig-
nals. The DS91D176 has a M-LVDS type 1 receiver input with
no offset. The DS91C176 receiver contains an M-LVDS type
2 failsafe circuit with an internal 100 mV offset that provides
a LOW output for both short and open input conditions.
Features
Meets TIA/EIA-899 M-LVDS Standard
Capable of driving 32 LVDS loads
Controlled Edge Rates Tolerant to Stubs
Wide Common Mode for Increased Noise Immunity
DS91D176 has type 1 receiver input
DS91C176 has type 2 receiver with fail-safe
Up to 200 Mbps operation
Industrial temperature range
Single 3.3V supply
8-lead SOIC package
Typical Application in AdvancedTCA Clock Distribution
© 2007 National Semiconductor Corporation 200246
20024630
www.national.com


National Semiconductor Electronic Components Datasheet

DS91C176 Datasheet

(DS91C176 / DS91D176) Multipoint-LVDS (M-LVDS) Transceivers

No Preview Available !

DS91C176 pdf
Connection and Logic Diagram
Top View
20024601
Order Number DS91D176TMA, DS91C176TMA
See NS Package Number M08A
Ordering Information
Order Number
DS91D176TMA
DS91C176TMA
Receiver Input
type 1
type 2
Function
Data (0V threshold receiver)
Control (100 mV offset fail-safe receiver)
M-LVDS Receiver Types
The EIA/TIA-899 M-LVDS standard specifies two different
types of receiver input stages. A type 1 receiver has a con-
ventional threshold that is centered at the midpoint of the input
amplitude, VID/2. A type 2 receiver has a built in offset that is
100mV greater then VID/2. The type 2 receiver offset acts as
a failsafe circuit where open or short circuits at the input will
always result in the output stage being driven to a low logic
state.
Package Type
SOIC/M08A
SOIC/M08A
20024640
FIGURE 1. M-LVDS Receiver Input Thresholds
www.national.com
2


Part Number DS91C176
Description (DS91C176 / DS91D176) Multipoint-LVDS (M-LVDS) Transceivers
Maker National Semiconductor
Total Page 14 Pages
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