low dynamic power (svga) xga/wxga tft-lcd timing controller.
n Reduced Swing Differential Signalling (RSDS™) digital bus reduces dynamic power, EMI and bus width from the timing controller n LVDS single pixel input interface system.
The FPD87346 is a timing controller that combines an LVDS single pixel input interface with National’s Reduced Swing Differential Signaling (RSDS™) output driver interface for (SVGA) XGA and Wide XGA resolutions. It resides on the TFT-LCD panel and p.
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