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National Semiconductor Electronic Components Datasheet

LF11202 Datasheet

Quad SPST JFET Analog Switches

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January 1995
LF11331/LF13331/LF11332/LF13332/LF11333/
LF13333/LF11201/LF13201/LF11202/LF13202
Quad SPST JFET Analog Switches
General Description
These devices are a monolithic combination of bipolar and
JFET technology producing the industry’s first one chip quad
JFET switch. A unique circuit technique is employed to main-
tain a constant resistance over the analog voltage range of
±10V. The input is designed to operate from minimum TTL
levels, and switch operation also ensures a
break-before-make action.
These devices operate from ±15V supplies and swing a
±10V analog signal. The JFET switches are designed for ap-
plications where a dc to medium frequency analog signal
needs to be controlled.
Features
n Analog signals are not loaded
n Constant “ON” resistance for signals up to ±10V and
100 kHz
n Pin compatible with CMOS switches with the advantage
of blow out free handling
n Small signal analog signals to 50 MHz
n Break-before-make action: tOFF < tON
n High open switch isolation at 1.0 MHz: −50 dB
n Low leakage in “OFF” state: <1.0 nA
n TTL, DTL, RTL compatibility
n Single disable pin opens all switches in package on
LF11331, LF11332, LF11333
n LF11201 is pin compatible with DG201
Test Circuit and Schematic Diagram
DS005667-2
FIGURE 1. Typical Circuit for One Switch
DS005667-12
FIGURE 2. Schematic Diagram (Normally Open)
© 1999 National Semiconductor Corporation DS005667
www.national.com


National Semiconductor Electronic Components Datasheet

LF11202 Datasheet

Quad SPST JFET Analog Switches

No Preview Available !

Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
(Note 2)
Supply Voltage (VCC−VEE)
Reference Voltage
Logic Input Voltage
Analog Voltage
Analog Current
36V
VEEVRVCC
VR−4.0VVINVR+6.0V
VEEVAVCC+6V;
VAVEE+36V
|IA|<20 mA
Power Dissipation (Note 3)
Molded DIP (N Suffix)
Cavity DIP (D Suffix)
Operating Temperature Range
LF11201, 2 and LF11331, 2, 3
LF13201, 2 and LF13331, 2, 3
Storage Temperature
Soldering Information
N and D Package (10 sec.)
SO Package:
Vapor Phase (60 sec.)
Infrared (15 sec.)
500 mW
900 mW
−55˚C to +125˚C
0˚C to +70˚C
−65˚C to +150˚C
300˚C
215˚C
220˚C
Electrical Characteristics (Note 4)
Symbol
Parameter
RON “ON” Resistance
RON Match
VA
IS(ON) +
ID(ON)
IS(OFF)
“ON” Resistance Matching
Analog Range
Leakage Current in “ON” Condition
Source Current in “OFF” Condition
ID(OFF)
Drain Current in “OFF” Condition
VINH
VINL
IINH
IINL
Logical “1” Input Voltage
Logical “0” Input Voltage
Logical “1” Input Current
Logical “0” Input Current
tON
tOFF
tON−tOFF
CS(OFF)
CD(OFF)
CS(ON) +
CD(ON)
ISO(OFF)
CT
SR
IDIS
Delay Time “ON”
Delay Time “OFF”
Break-Before-Make
Source Capacitance
Drain Capacitance
Active Source and Drain Capacitance
“OFF” Isolation
Crosstalk
Analog Slew Rate
Disable Current
IEE Negative Supply Current
IR Reference Supply Current
ICC Positive Supply Current
Conditions
VA=0, ID=1 mA
Switch “ON,” VS=VD=±10V
Switch “OFF,” VS=+10V,
VD=−10V
Switch “OFF,” VS=+10V,
VD=−10V
VIN=5V
VIN=0.8
VS=±10V, (Figure 3)
VS=±10V, (Figure 3)
VS=±10V, (Figure 3)
Switch “OFF,” VS=±10V
Switch “OFF,” VD=±10V
Switch “ON,” VS=VD=0V
LF11331/2/3
LF13331/2/3
LF11201/2
LF13201/2
Min Typ Max Min Typ Max
TA=25˚C
150 200
200 300
150 250
200 350
TA=25˚C
5 20
10
±10 ±11
±10 ±11
50
TA=25˚C
0.3 5
3 100
0.3 10
3 30
TA=25˚C
0.4 5
3 100
0.4 10
3 30
TA=25˚C
0.1 5
3 100
0.1 10
3 30
2.0 2.0
0.8 0.8
TA=25˚C
3.6 10
25
3.6 40
100
TA=25˚C
0.1
1
0.1
1
TA=25˚C
TA=25˚C
TA=25˚C
TA=25˚C
TA=25˚C
TA=25˚C
500
90
80
4.0
3.0
5.0
500
90
80
4.0
3.0
5.0
Units
V
nA
nA
nA
nA
nA
nA
V
V
µA
µA
µA
ns
ns
ns
pF
pF
pF
(Figure 4), (Note 5)
(Figure 4), (Note 5)
(Note 6)
(Figure 5), (Note 7)
TA=25˚C
TA=25˚C
TA=25˚C
TA=25˚C
All Switches “OFF,” VS=±10V TA=25˚C
All Switches “OFF,” VS=±10V TA=25˚C
All Switches “OFF,” VS=±10V TA=25˚C
−50
−65
50
0.4 1.0
0.6 1.5
3.0 5.0
4.2 7.5
2.0 4.0
2.8 6.0
4.5 6.0
6.3 9.0
−50
−65
50
0.6 1.5
0.9 2.3
4.3 7.0
6.0 10.5
2.7 5.0
3.8 7.5
7.0 9.0
9.8 13.5
dB
dB
V/µs
mA
mA
mA
mA
mA
mA
mA
mA
Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits.
Note 2: Refer to RETSF11201X, RETSF11331X, RETSF11332X and RETSF11333X for military specifications.
Note 3: For operating at high temperature the molded DIP products must be derated based on a +100˚C maximum junction temperature and a thermal resistance
of +150˚C/W, devices in the cavity DIP are based on a +150˚C maximum junction temperature and are derated at ±100˚C/W.
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2


Part Number LF11202
Description Quad SPST JFET Analog Switches
Maker National Semiconductor
Total Page 18 Pages
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