LM2507 Description
The LM2507 device adapts i80 CPU style display interfaces to the Mobile Pixel Link (MPL) Level zero serial link. When using smart CPU type interfaces, two chip selects support a main and sub display. A mode pin configures the device as a Master (MST) or Slave (SLV) so the same chip can be used on both sides of the interface.
LM2507 Key Features
- CS1- & CS2- n MPL-Level 0 Physical Layer using two data and one clock signal n Low Power Consumption n Pinout mirroring