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National Semiconductor Electronic Components Datasheet

LMX2485E Datasheet

High Performance Delta-Sigma Low Power Dual PLLatinum Frequency Synthesizers

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LMX2485E pdf
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February 2006
LMX2485/LMX2485E
50 MHz - 3.0 GHz High Performance Delta-Sigma Low
Power Dual PLLatinumFrequency Synthesizers with
800 MHz Integer PLL
General Description
The LMX2485 is a low power, high performance delta-sigma
fractional-N PLL with an auxiliary integer-N PLL. The device
is fabricated using National Semiconductor’s advanced pro-
cess.
With delta-sigma architecture, fractional spurs at lower offset
frequencies are pushed to higher frequencies outside the
loop bandwidth. The ability to push close in spur and phase
noise energy to higher frequencies is a direct function of the
modulator order. Unlike analog compensation, the digital
feedback technique used in the LMX2485 is highly resistant
to changes in temperature and variations in wafer process-
ing. The LMX2485 delta-sigma modulator is programmable
up to fourth order, which allows the designer to select the
optimum modulator order to fit the phase noise, spur, and
lock time requirements of the system.
Serial data for programming the LMX2485 is transferred via
a three line high speed (20 MHz) MICROWIRE interface.
The LMX2485 offers fine frequency resolution, low spurs,
fast programming speed, and a single word write to change
the frequency. This makes it ideal for direct digital modula-
tion applications, where the N counter is directly modulated
with information. The LMX2485 is available in a 24 lead
4.0 X 4.0 X 0.8 mm LLP package.
Applications
n Cellular phones and base stations
CDMA, WCDMA, GSM/GPRS, TDMA, EDGE, PDC
n Direct digital modulation applications
n Satellite and cable TV tuners
n WLAN Standards
Features
Quadruple Modulus Prescalers for Lower Divide Ratios
n RF PLL: 8/9/12/13 or 16/17/20/21
n IF PLL: 8/9 or 16/17
Advanced Delta Sigma Fractional Compensation
n 12 bit or 22 bit selectable fractional modulus
n Up to 4th order programmable delta-sigma modulator
Features for Improved Lock Times and Programming
n Fastlock / Cycle slip reduction
n Integrated time-out counter
n Single word write to change frequencies with Fastlock
Wide Operating Range
n LMX2485 RF PLL: 500 MHz to 3.0 GHz
n LMX2485E RF PLL: 50 MHz to 3.0 GHz
Useful Features
n Digital lock detect output
n Hardware and software power-down control
n On-chip crystal reference frequency doubler.
n RF phase comparison frequency up to 50 MHz
n 2.5 to 3.6 volt operation with ICC = 5.0 mA at 3.0 V
Functional Block Diagram
PLLatinumis a trademark of National Semiconductor Corporation.
© 2006 National Semiconductor Corporation DS200877
20087701
www.national.com


National Semiconductor Electronic Components Datasheet

LMX2485E Datasheet

High Performance Delta-Sigma Low Power Dual PLLatinum Frequency Synthesizers

No Preview Available !

LMX2485E pdf
Connection Diagram
Top View
24-Pin LLP (SQ)
20087722
Pin Descriptions
Pin #
0
1
2
3
4
5
Pin
Name
GND
CPoutRF
GND
VddRF1
FinRF
FinRF*
I/O
-
O
-
-
I
I
6 LE
I
7 DATA
8 CLK
I
I
9 VddRF2
10 CE
11 VddRF5
12 Ftest/LD
13 FinIF
14 VddIF1
15 GND
16 CPoutIF
17 VddIF2
18 OSCout
19 ENOSC
-
I
I
O
I
-
-
O
-
O
I
20 OSCin
21 NC
22 VddRF3
23 FLoutRF
24 VddRF4
I
I
-
O
-
Pin Description
Ground Substrate. This is on the bottom of the package and must be grounded.
RF PLL charge pump output.
RF PLL analog ground.
RF PLL analog power supply.
RF PLL high frequency input pin.
RF PLL complementary high frequency input pin. Shunt to ground with a 100 pF
capacitor.
MICROWIRE Load Enable. High impedance CMOS input. Data stored in the shift
registers is loaded into the internal latches when LE goes HIGH
MICROWIRE Data. High impedance binary serial data input.
MICROWIRE Clock. High impedance CMOS Clock input. Data for the various counters is
clocked into the 24 bit shift register on the rising edge
Power supply for RF PLL digital circuitry.
Chip Enable control pin. Must be pulled high for normal operation.
Power supply for RF PLL circuitry.
Test frequency output / Lock Detect.
IF PLL high frequency input pin.
IF PLL analog power supply.
IF PLL digital ground.
IF PLL charge pump output
IF PLL power supply.
Buffered output of the OSCin signal.
Oscillator enable. When this is set to high, the OSCout pin is enabled regardless of the
state of other pins or register bits.
Input for TCXO signal.
This pin must be left open.
Power supply for RF PLL digital circuitry.
RF PLL Fastlock Output. Also functions as Programmable TRI-STATE CMOS output.
RF PLL analog power supply.
www.national.com
2


Part Number LMX2485E
Description High Performance Delta-Sigma Low Power Dual PLLatinum Frequency Synthesizers
Maker National Semiconductor
Total Page 30 Pages
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