MM54C32 Datasheet, National Semiconductor

Y Wide supply voltage range Y Guaranteed noise margin Y High noise immunity Y Low power TTL compatibility Connection Diagram Dual-In-Line Package February 1988 3 0V to.

Employing complementary MOS (CMOS) transistors to achieve low power and high noise margin these gates provide the basic functions used in the implementation of digital integrated circuit systems The N- and P-channel enhancement mode transistors provi.