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MM74C42 - BCD-to-Decimal Decoder

Download the MM74C42 datasheet PDF. This datasheet also covers the MM74C42J variant, as both devices belong to the same bcd-to-decimal decoder family and are provided as variant models within a single manufacturer datasheet.

General Description

The MM54C42 MM74C42 one-of-ten decoder is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors This decoder produces a logical ‘‘0’’ at the output corresponding to a four bit binary input from zero to nine and a logical ‘‘1’’ at the other

Key Features

  • Y Supply voltage range Y Tenth power TTL compatible 3V to 15V drive 2 LPTTL loads Y High noise immunity Y Low power Y Medium speed operation 0 45 VCC (typ ) 50 nW (typ ) 10 MHz (typ ) with 10V VCC.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MM74C42J_NationalSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
MM74C42 BCD-to-Decimal Decoder Fairchild
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MM74C00 Quad 2-Input NAND Gate / Quad 2-Input NOR Gate / Hex Inverter / Triple 3-Input NAND Gate / Dual 4-Input NAND Gate National
MM74C02 Quad 2-Input NAND Gate / Quad 2-Input NOR Gate / Hex Inverter / Triple 3-Input NAND Gate / Dual 4-Input NAND Gate National

Other Datasheets by National Semiconductor (now Texas Instruments)

Part Number Description
MM74C48 BCD-to-7 Segment Decoder
MM74C150 16-Line to 1-Line Multiplexer
MM74C160 Decade Counter with Asynchronous Clear
MM74C161 (MM74C160 - MM74C163) Decade Counter with Asynchronous Clear
MM74C162 (MM74C160 - MM74C163) Decade Counter with Asynchronous Clear

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
MM54C42 MM74C42 BCD-to-Decimal Decoder March 1988 MM54C42 MM74C42 BCD-to-Decimal Decoder General Description The MM54C42 MM74C42 one-of-ten decoder is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors This decoder produces a logical ‘‘0’’ at the output corresponding to a four bit binary input from zero to nine and a logical ‘‘1’’ at the other outputs For binary inputs from ten to fifteen all outputs are logical ‘‘1’’ Features Y Supply voltage range Y Tenth power TTL compatible 3V to 15V drive 2 LPTTL loads Y High noise immunity Y Low power Y Medium speed operation 0 45 VCC (typ ) 50 nW (typ ) 10 MHz (typ ) with 10V VCC Applications Y Automotive Y Data terminals Y Instrumentation Y Medical electronics Y Alarm systems