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National Semiconductor Electronic Components Datasheet

PC8374L Datasheet

Super I/O

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www.DataSheet4U.com Winbond Electronics Corp. Advanced PC Product Center
Preliminary
May 2004
Revision 1.1
PC8374L
SensorPathTM SuperI/O with Glue Functions
General Description
The National Semiconductor PC8374L Advanced I/O prod-
uct is a member of the PC837x SuperI/O family. All PC837x
devices are highly integrated and are pin and software com-
patible, thus providing drop-in interchangeability and
enabling a variety of assembly options using only a single
motherboard and BIOS.
PC8374L integration allows for a smaller system board size and
saves on total system cost.
The PC8374L includes legacy SuperI/O functions, system
glue functions, health monitoring and control, commonly
used functions such as GPIO, and ACPI-compliant Power
Management support.
The PC8374L integrates miscellaneous analog and digital
system glue functions to reduce the number of discrete
components required. The host communicates with the
functions integrated in the PC8374L device through an LPC
Bus Interface.
The PC8374L extended wake-up support complements the
ACPI controller in the chipset. The System Wake-Up Control
(SWC) module, powered by VSB3, supports a flexible wake-
up mechanism.
The PC8374L supports both I/O and memory mapping of
module registers and enables building legacy-free systems.
Outstanding Features
SensorPathinterface to LMxx sensor devices for system
health support
Fan monitor and control
Heceta6-compatible register set, accessible via the LPC
interface and SMBus
Glue functions to complement the South Bridge func-
tionality
VSB3-powered Power Management with 19 wake-up
sources
Controls three LED indicators
16 GPIO ports with a variety of wake-up options
I/O-mapped and memory-mapped registers
Legacy modules: Parallel Port, Floppy Disk Controller
(FDC), two Serial Ports, Slow InfraRed Port and a Key-
board and Mouse Controller (KBC)
LPC interface, based on Intel’s LPC Interface Specifica-
tion Revision 1.1, August 2002
PC01 Revision 1.0 and Advanced Configuration and
Power Interface (ACPI) Specification Revision 2.0 compliant
128-pin PQFP package
Block Diagram
South Bridge
LPC Bus
System
BIOS
SMBus I/F
VBAT
Power Management
PC8374L
Serial Interfaces
Parallel Port Interfaces
Floppy Drive Interface
PS/2 Interfaces
KBC Ports
Infrared Interface
GPIO Ports
www.DataSheet4U.com
Reset
Logic
LEDs
SensorPathTM I/F
Tacho
LMxx Sensors
Power
Supply
PWM
DDrDvrvrv
National Semiconductor and TRI-STATEare registered trademarks of National Semiconductor Corporation.
SensorPathis a trademark of National Semiconductor Corporation.
All other brand or product names are trademarks or registered trademarks of their respective holders.
© 2004 National Semiconductor Corporation
www.national.com


National Semiconductor Electronic Components Datasheet

PC8374L Datasheet

Super I/O

No Preview Available !

www.DataSheet4U.com Winbond Electronics Corp. Advanced PC Product Center
Features
System Health Support
SensorPath interface to sensors optimizes
digital/analog partitioning
Simplifies board design and routing
Supports distributed sensors and centralized control
Health monitoring is self-contained and requires
minimal host attention
Faster boot time
Off loads SMBus, and enables ASF compliance
Fan Monitor and Control
Three PWM-based fan controls
Four 16-bit resolution tachometer inputs
Software or local temperature feedback control
Heceta6-compatible register set accessible via the
LPC interface and SMBus
Supports the following combinations of LMxx devices:
LM96011 and optional LM95010
LM96012
LM96010
Simultaneous read support via LPC interface and SMBus
Glue Functions
Generates the power-related signals:
Main Power good
Power distribution control (for switching between
Main and Standby regulators)
Resume reset (Master Reset) according to the 5V
standby supply status
Main power supply turn on (PS_ON)
Voltage translation between 2.5V or 3.3V levels (DDC) and
5V levels (VGA) for the SMBus serial clock and data signals
Isolation circuitry for the SMBus serial clock and data signals
Buffers PCI_RESET to generate two reset output signals
Buffers PCI_RESET to generate IDE reset output.
Generates “highest active supply” reference voltage
Based on 3.3V and 5V Main supplies
Based on 3.3V and 5V Standby supplies
High-current LED driver control for Hard Disk Drive
activity indication
Software selectable alternative functionality, through pin
multiplexing
General-Purpose I/O (GPIO) Ports
All 16 GPIO ports powered by VSB3
Each pin individually configured as input or output
Programmable features for each output pin:
Drive type (open-drain, push-pull or TRI-STATE)
TRI-STATE on detection of falling VDD3 for
VSB3-powered pins driving VDD-supplied devices
wwwPr.oDgraamtamSabhleeoeptti4onUfo.rciontmernal pull-up resistor on each
input pin (some with internal pull-down resistor option)
Lock option for the configuration and data of each output pin
15 GPIO ports generate IRQ/SIOPME for wake-up
events; each GPIO has separate:
Enable control of event status routing to IRQ
Enable control of event status routing to SIOPME (via SWC)
Polarity and edge/level selection
Programmable debouncing
Power Management
Supports ACPI Specification Revision 2.0b, July 27, 2000
System Wake-Up Control (SWC)
Optional routing of events to generate SCI
(SIOPME) on detection of:
Keyboard or Mouse events
Ring Indication RI on each of the two serial ports
General-Purpose Input Events from 15 GPIO pins
IRQs of the Keyboard and Mouse Controller
IRQs of the other internal modules
Optional routing of the SCI (SIOPME) to generate
IRQ (SERIRQ)
Implements the GPE1_BLK of the ACPI General Pur-
pose (Generic) Register blocks with “child” events
VSB3-powered event detection and event-logic
configuration
Enhanced Power Management (PM), including:
Special configuration registers for power down
Low-leakage pins
Low-power CMOS technology
Ability to disable all modules
High-current LED drivers control (two LEDs) for
power status indication with:
Standard blinking, controlled by software
Advanced blinking, controlled by power supply
status, sleep state or software
Special blinking, controlled by power supply sta-
tus, sleep state and software bit
VBAT-powered indication of the Main power supply
state before an AC power failure
Keyboard Events
Wake-up on any key
Supports programmable 8-byte sequence “Pass-
word” or “Special Keys” for Power Management
Simultaneous recognition of three programmable
keys (sequences): “Power”, “Sleep” and “Resume”
Wake-up on mouse movement and/or button click
Bus Interface
LPC Bus Interface
Based on Intel’s LPC Interface Specification Revi-
sion 1.1, August 2002
I/O, Memory and 8-bit Firmware Memory read and
write cycles
Up to four 8-bit DMA channels
Serial IRQ (SERIRQ)
Supports registers memory and I/O mapping
www.national.com
2
Revision 1.1


Part Number PC8374L
Description Super I/O
Maker National Semiconductor
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PC8374L Datasheet PDF






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