Datasheet4U Logo Datasheet4U.com

SCAN18373T - Transparent Latch

General Description

The SCAN18373T is a high speed, low-power transparent latch featuring separate data inputs organized into dual 9-bit bytes with byte-oriented latch enable and output enable control signals.

Key Features

  • n n n n n n n n n n IEEE 1149.1 (JTAG) Compliant Buffered active-low latch enable TRI-STATE outputs for bus-oriented.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
SCAN182245A Non-Inverting Transceiver Fairchild Semiconductor
SCAN18245T Non-Inverting Transceiver Fairchild Semiconductor
SCAN18540T Inverting Line Driver Fairchild Semiconductor
SCAN15MB200 Dual 1.5 Gbps 2:1/1:2 LVDS Mux/Buffer Texas Instruments
SCAN90CP02 1.5 Gbps 2x2 LVDS Crosspoint Switch Texas Instruments

Other Datasheets by National Semiconductor (Texas Instruments)

Part Number Description
SCAN18374T D Flip-Flop
SCAN182245A Non-Inverting Transceiver
SCAN18245T Non-Inverting Transceiver
SCAN18540T Inverting Line Driver
SCAN18541T Non-Inverting Line Driver

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
SCAN18373T Transparent Latch with TRI-STATE Outputs September 1998 SCAN18373T Transparent Latch with TRI-STATE ® Outputs General Description The SCAN18373T is a high speed, low-power transparent latch featuring separate data inputs organized into dual 9-bit bytes with byte-oriented latch enable and output enable control signals. This device is compliant with IEEE 1149.1 Standard Test Access Port and Boundary Scan Architecture with the incorporation of the defined boundary-scan test logic and test access port consisting of Test Data Input (TDI), Test Data Out (TDO), Test Mode Select (TMS), and Test Clock (TCK). Features n n n n n n n n n n IEEE 1149.