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SCANSTA111 Datasheet

Enhanced SCAN bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port

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April 2004
SCANSTA111
Enhanced SCAN bridge
Multidrop Addressable IEEE 1149.1 (JTAG) Port
General Description
The SCANSTA111 extends the IEEE Std. 1149.1 test bus
into a multidrop test bus environment. The advantage of a
multidrop approach over a single serial scan chain is im-
proved test throughput and the ability to remove a board
from the system and retain test access to the remaining
modules. Each SCANSTA111 supports up to 3 local
IEEE1149.1 scan rings which can be accessed individually
or combined serially. Addressing is accomplished by loading
the instruction register with a value matching that of the Slot
inputs. Backplane and inter-board testing can easily be ac-
complished by parking the local TAP Controllers in one of the
stable TAP Controller states via a Park instruction. The 32-bit
TCK counter enables built in self test operations to be per-
formed on one port while other scan chains are simulta-
neously tested.
Features
n True IEEE 1149.1 hierarchical and multidrop
addressable capability
n The 7 slot inputs support up to 121 unique addresses,
an Interrogation Address, Broadcast Address, and 4
Multi-cast Group Addresses (address 000000 is
reserved)
n 3 IEEE 1149.1-compatible configurable local scan ports
n Mode Register0 allows local TAPs to be bypassed,
selected for insertion into the scan chain individually, or
serially in groups of two or three
n Transparent Mode can be enabled with a single
instruction to conveniently buffer the backplane IEEE
1149.1 pins to those on a single local scan port
n LSP ACTIVE outputs provide local port enable signals
for analog busses supporting IEEE 1149.4.
n General purpose local port passthrough bits are useful
for delivering write pulses for FPGA programming or
monitoring device status.
n Known Power-up state
n TRST on all local scan ports
n 32-bit TCK counter
n 16-bit LFSR Signature Compactor
n Local TAPs can become TRI-STATE via the OE input to
allow an alternate test master to take control of the local
TAPs (LSP0-2 have a TRI-STATE notification output)
n 3.0-3.6V VCC Supply Operation
n Power-off high impedance inputs and outputs
n Supports live insertion/withdrawal
Connection Diagrams
10124502
© 2004 National Semiconductor Corporation DS101245
10124516
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National Semiconductor Electronic Components Datasheet

SCANSTA111 Datasheet

Enhanced SCAN bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port

No Preview Available !

TABLE 1. Glossary
LFSR
Linear Feedback Shift Register. When enabled, will generate a 16-bit signature of sampled serial test
data.
LSP
Local
Local Scan Port. A four signal port that drives a local (i.e. non-backplane) scan chain. (e.g., TCK0, TMS0,
TDO0, TDI0).
Local is used to describe IEEE Std. 1149.1 compliant scan rings and the SCANSTA111 Test Access Port
that drives them. The term local was adopted from the system test architecture that the ’STA111 will most
commonly be used in; namely, a system test backplane with a ’STA111 on each card driving up to 3 local
scan rings per card. (Each card can contain multiple ’STA111s, with 3 local scan ports per ’STA111.)
Park/Unpark/Unparked Parked, unpark, and unparked, are used to describe the state of the LSP controller and the state of the
local TAP controllers (the local TAP controllers refers to the TAP controllers of the scan components that
make up a local scan ring). Park is also used to describe the action of parking a LSP (transitioning into
one of the Parked LSP controller states). It is important to understand that when a LSP controller is in
one of the parked states, TMSn is held constant, thereby holding or parking the local TAP controllers in a
given state.
TAP Test Access Port as defined by IEEE Std. 1149.1.
Selected/Unselected Selected and Unselected refers to the state of the ’STA111 Selection Controller. A selected ’STA111 has
been properly addressed and is ready to receive Level 2 protocol. Unselected ’STA111s monitor the
system test backplane, but do not accept Level 2 protocol (except for the GOTOWAIT instruction). The
data registers and LSPs of unselected ’STA111s are not accessible from the system test master.
Active Scan Chain
The Active Scan Chain refers to the scan chain configuration as seen by the test master at a given
moment. When a ’STA111 is selected with all of its LSPs parked, the active scan chain is the current
scan register only. When a LSP is unparked, the active scan chain becomes: TDIB the current ’STA111
register the local scan ring registers a PAD bit TDOB. Refer to Table 7 for Unparked
configurations of the LSP network.
Level 1 Protocol
Level 1 is the protocol used to address a ’STA111.
Level 2 Protocol
Level 2 is the protocol that is used once a ’STA111 is selected. Level 2 protocol is IEEE Std. 1149.1
compliant when an individual ’STA111 is selected.
PAD
A one bit register that is placed at the end of each local scan port scan-chain. The PAD bit eliminates the
prop delay that would be added by the ’STA111 LSPN logic between TDIn and TDO(n+1) or TDOB by
buffering and synchronizing the LSP TDI inputs to the falling edge of TCKB, thus allowing data to be
scanned at higher frequencies without violating set-up and hold times.
LSB Least Significant Bit, the right-most position in a register (bit 0).
MSB
Most Significant Bit, the left-most position in a register.
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Part Number SCANSTA111
Description Enhanced SCAN bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port
Maker National Semiconductor
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