* dual redundant inputs, five differential outputs, and an optional default-clock upon power up. The input block is equipped with loss of signal detection and automatic or manual selection of the reference clock. Each clock output consists of a programmable divider, a phase synchronization circuit, a
LMK04031B
National Semiconductor Corporation
1.23 MB
Precision clock conditioners low-noise clock jitter cleaner.
LMK04000 Family Low-Noise Clock Jitter Cleaner with Cascaded PLLs www.DataSheet4U.com July 24, 2009 LMK04000 Family Low-Noise Clock Jitter Cleaner.
📁 Related Datasheet
LMK04031 Family Low-Noise Clock Jitter Cleaner (Texas Instruments)
LMK04033 Family Low-Noise Clock Jitter Cleaner (Texas Instruments)
LMK04000 Family Low-Noise Clock Jitter Cleaner (Texas Instruments)
LMK04000 Low-Noise Clock Jitter Cleaner (National Semiconductor)
LMK04001 Family Low-Noise Clock Jitter Cleaner (Texas Instruments)
LMK04002 Family Low-Noise Clock Jitter Cleaner (Texas Instruments)
LMK04010 Family Low-Noise Clock Jitter Cleaner (Texas Instruments)
LMK04011 Family Low-Noise Clock Jitter Cleaner (Texas Instruments)
LMK04100 Family Clock Jitter Cleaner (Texas Instruments)
LMK04101 Family Clock Jitter Cleaner (Texas Instruments)
TAGS
Image Gallery
