Datasheet4U Logo Datasheet4U.com

MSC2313258D - DRAM-MODULE

General Description

The MSC2313258D-xxBS2/DS2 is a fully decoded, 1,048,576-word x 32-bit CMOS dynamic random access memory module composed of two 16Mb DRAMs in SOJ packages mounted with four decoupling capacitors on a 72-pin glass epoxy single-inline package.

Key Features

  • 1,048,576-word x 32-bit organization.
  • 72-pin socket insertable module MSC2313258D-xxBS2 : Gold tab MSC2313258D-xxDS2 : Solder tab.
  • Single +5V supply ± 10% tolerance.
  • Input : TTL compatible.
  • Output : TTL compatible, 3-state.
  • Refresh : 1024cycles/16ms.
  • /CAS before /RAS refresh, hidden refresh, /RAS only refresh capability.
  • Fast page mode capability.

📥 Download Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet.co.kr This version: Feb. 23. 1999 Semiconductor MSC2313258D-xxBS2/DS2 1,048,576-word x 32-bit DYNAMIC RAM MODULE : FAST PAGE MODE TYPE WITH EDO DESCRIPTION The MSC2313258D-xxBS2/DS2 is a fully decoded, 1,048,576-word x 32-bit CMOS dynamic random access memory module composed of two 16Mb DRAMs in SOJ packages mounted with four decoupling capacitors on a 72-pin glass epoxy single-inline package. This module supports any application where high density and large capacity of storage memory are required.