74ALVC16244 Description
The ALVC16244 contains sixteen non−inverting buffers with 3−STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble (4−bit) controlled. Each nibble has separate 3−STATE control inputs which can be shorted together for full 16−bit operation.
74ALVC16244 Key Features
- 1.65 V
- 3.6 V VCC Supply Operation
- 3.6 V Tolerant Inputs and Outputs
- 3.0 ns max for 3.0 V to 3.6 V VCC
- 3.5 ns max for 2.3 V to 2.7 V VCC
- 6.0 ns max for 1.65 V to 1.95 V VCC
- Power-off High Impedance Inputs and Outputs
- Supports Live Insertion and Withdrawal
- Uses Patented Noise/EMI Reduction Circuitry
- Latch-up conforms to JEDEC JED98