74VHC540 - Octal Bus Buffer

ON Semiconductor

Datasheet Details

inputs and outputs on opposite sides of the package and two AND.
ed active.
low output enables. When either OE1 or OE2 are high, the terminal outputs are in the high impedance state. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems. Features.
High Speed: tPD = 3.7 ns (Typ) at VCC = 5.0 V.

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Published: Aug 5, 2015 |