75329D
Features
- 20A, 55V
- Simulation Models
- Temperature pensated PSPICE® and SABER™ Models
- SPICE and SABER Thermal Impedance Models Available on the WEB at: .onsemi.
- Peak Current vs Pulse Width Curve
- UIS Rating Curve
- Related Literature
- TB334, “Guidelines for Soldering Surface Mount ponents to PC Boards”
Symbol
Packaging
JEDEC TO-252AA
GATE SOURCE
DRAIN (FLANGE)
©2001 Semiconductor ponents Industries, LLC. October-2017, Rev. 3
Publication Order Number: HUF75329D3S/D
HUF75329D3S
Absolute Maximum Ratings TC = 25o C, Unless Otherwise Specified
Drain to Source Voltage (Note 1)
- -
- - . . . VDSS Drain to Gate Voltage (RGS = 20kΩ) (Note 1)
- - . . . VDGR Gate to Source Voltage
- -
- -
- - . VGS Drain Current
Continuous (Figure 2)-
- -
- -
- . . . ID
Pulsed Drain Current
- -
- -
- . . ....
