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CAT1025 - EEPROM Serial 2k-bit I2C and Manual Reset

Download the CAT1025 datasheet PDF (CAT1024 included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for eeprom serial 2k-bit i2c and manual reset.

Description

The CAT1024 and CAT1025 are complete memory and supervisory solutions for microcontroller

based systems.

bit serial EEPROM memory and a system power supervisor with brown

out protection are integrated together in low power CMOS technology.

Features

  • a 16.
  • byte page. In addition, hardware data protection is provided by a VCC sense circuit that prevents writes to memory whenever VCC falls below the reset threshold or until VCC reaches the reset threshold during power up. Available packages include a surface mount 8.
  • pin SOIC, 8.
  • pin TSSOP, 8.
  • pin TDFN and 8.
  • pin MSOP packages. The TDFN package thickness is 0.8 mm maximum. TDFN footprint is 3 x 3 mm. www. onsemi. com TSSOP.
  • 8 CASE 948S SOIC.
  • 8.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CAT1024-ONSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number CAT1025
Manufacturer onsemi
File Size 239.67 KB
Description EEPROM Serial 2k-bit I2C and Manual Reset
Datasheet download datasheet CAT1025 Datasheet
Other Datasheets by ON Semiconductor

Full PDF Text Transcription

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CAT1024, CAT1025 Supervisory Circuits with EEPROM Serial 2k-bit I2C and Manual Reset Description The CAT1024 and CAT1025 are complete memory and supervisory solutions for microcontroller−based systems. A 2k−bit serial EEPROM memory and a system power supervisor with brown−out protection are integrated together in low power CMOS technology. Memory interface is via a 400 kHz I2C bus. The CAT1025 provides a precision VCC sense circuit and two open drain outputs: one (RESET) drives high and the other (RESET) drives low whenever VCC falls below the reset threshold voltage. The CAT1025 also has a Write Protect input (WP). Write operations are disabled if WP is connected to a logic high.
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