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  ON Semiconductor Electronic Components Datasheet  

CAT24C256 Datasheet

256kb I2C CMOS Serial EEPROM

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CAT24C256 pdf
CAT24C256
256 kb I2C CMOS Serial
EEPROM
Description
The CAT24C256 is a 256 kb Serial CMOS EEPROM, internally
organized as 32,768 words of 8 bits each.
It features a 64byte page write buffer and supports the Standard
(100 kHz), Fast (400 kHz) and FastPlus (1 MHz) I2C protocol.
Write operations can be inhibited by taking the WP pin High (this
protects the entire memory).
External address pins make it possible to address up to eight
CAT24C256 devices on the same bus.
OnChip ECC (Error Correction Code) makes the device suitable
for high reliability applications.*
Features
Supports Standard, Fast and FastPlus I2C Protocol
1.8 V to 5.5 V Supply Voltage Range
64Byte Page Write Buffer
Hardware Write Protection for Entire Memory
Schmitt Triggers and Noise Suppression Filters on I2C Bus Inputs
(SCL and SDA)
Low Power CMOS Technology
1,000,000 Program/Erase Cycles
100 Year Data Retention
Industrial and Extended Temperature Range
PDIP, SOIC, TSSOP, MSOP 8Lead and
TDFN, UDFN 8Pad Packages
This Device is PbFree, Halogen Free/BFR Free, and RoHS
Compliant
VCC
SCL
A2, A1, A0
WP
CAT24C256
SDA
VSS
Figure 1. Functional Symbol
* Available for New Product (Rev. E)
© Semiconductor Components Industries, LLC, 2014
January, 2014 Rev. 14
1
http://onsemi.com
TDFN8**
ZD2 SUFFIX
CASE 511AM
TSSOP8
Y SUFFIX
CASE 948AL
PDIP8
L SUFFIX
CASE 646AA
SOIC8
X SUFFIX
CASE 751BE
SOIC8
W SUFFIX
CASE 751BD
UDFN8
HU4 SUFFIX
CASE 517AZ
MSOP8
Z SUFFIX
CASE 846AD
PIN CONFIGURATION
A0 1
A1
VCC
WP
A2 SCL
VSS SDA
PDIP (L), SOIC (W, X), TSSOP (Y),
TDFN (ZD2)**, UDFN (HU4), MSOP (Z)
For the location of Pin 1, please consult the
corresponding package drawing.
** Not recommended for new designs
PIN FUNCTION
Pin Name
Function
A0, A1, A2
SDA
Device Address
Serial Data
SCL Serial Clock
WP Write Protect
VCC Power Supply
VSS Ground
†The exposed pad for the TDFN/UDFN packages can
be left floating or connected to Ground.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 18 of this data sheet.
Publication Order Number:
CAT24C256/D


  ON Semiconductor Electronic Components Datasheet  

CAT24C256 Datasheet

256kb I2C CMOS Serial EEPROM

No Preview Available !

CAT24C256 pdf
CAT24C256
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameters
Ratings
Units
Storage Temperature
–65 to +150
°C
Voltage on any Pin with Respect to Ground (Note 1)
–0.5 to +6.5
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. The DC input voltage on any pin should not be lower than 0.5 V or higher than VCC + 0.5 V. During transitions, the voltage on any pin may
undershoot to no less than 1.5 V or overshoot to no more than VCC + 1.5 V, for periods of less than 20 ns.
Table 2. RELIABILITY CHARACTERISTICS (Note 2)
Symbol
Parameter
Min Units
NEND (Notes 3, 4) Endurance
1,000,000
Program/Erase Cycles
TDR Data Retention
100 Years
2. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AECQ100
and JEDEC test methods.
3. Page Mode, VCC = 5 V, 25°C.
4. The new product revision (E) uses ECC (Error Correction Code) logic with 6 ECC bits to correct one bit error in 4 data bytes. Therefore, when
a single byte has to be written, 4 bytes (including the ECC bits) are reprogrammed. It is recommended to write by multiple of 4 bytes in order
to benefit from the maximum number of write cycles.
Table 3. D.C. OPERATING CHARACTERISTICS Mature Product (Rev D)
(VCC = 2.5 V to 5.5 V, TA = 40°C to +125°C, and VCC = 1.8 V to 5.5 V, TA = 40°C to +85°C, unless otherwise specied.)
Symbol
Parameter
Test Conditions
Min Max
ICCR
ICC
ISB
IL
VIL
VIH
VOL1
VOL2
Read Current
Write Current
Standby Current
I/O Pin Leakage
Input Low Voltage
Input High Voltage
Output Low Voltage
Output Low Voltage
Read, fSCL = 400 kHz
Write, fSCL = 400 kHz
All I/O Pins at GND or VCC
Pin at GND or VCC
VCC 2.5 V, IOL = 3.0 mA
VCC < 2.5 V, IOL = 1.0 mA
TA = 40°C to +85°C
TA = 40°C to +125°C
TA = 40°C to +85°C
TA = 40°C to +125°C
0.5
VCC x 0.7
1
3
1
2
1
2
VCC x 0.3
VCC + 0.5
0.4
0.2
Units
mA
mA
mA
mA
V
V
V
V
Table 4. PIN IMPEDANCE CHARACTERISTICS Mature Product (Rev D)
(VCC = 2.5 V to 5.5 V, TA = 40°C to +125°C, and VCC = 1.8 V to 5.5 V, TA = 40°C to +85°C, unless otherwise specied.)
Symbol
Parameter
Conditions
Max
Units
CIN (Note 5)
SDA I/O Pin Capacitance
VIN = 0 V
8 pF
CIN (Note 5)
Input Capacitance (other pins)
VIN = 0 V
6 pF
IWP (Note 6)
WP Input Current
VIN < VIH, VCC = 5.5 V
130 mA
VIN < VIH, VCC = 3.3 V
120
VIN < VIH, VCC = 1.8 V
80
VIN > VIH
1
5. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AECQ100
and JEDEC test methods.
6. When not driven, the WP pin is pulled down to GND internally. For improved noise immunity, the internal pulldown is relatively strong;
therefore the external driver must be able to supply the pulldown current when attempting to drive the input HIGH. To conserve power, as
the input level exceeds the trip point of the CMOS input buffer (~ 0.5 x VCC), the strong pulldown reverts to a weak current source. The
variable WP input impedance is available only for Die Rev. C and higher.
http://onsemi.com
2


Part Number CAT24C256
Description 256kb I2C CMOS Serial EEPROM
Maker ON Semiconductor
Total Page 18 Pages
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