FAN3268-F085
FAN3268-F085 is 2A Low-Voltage PMOS-NMOS Bridge Driver manufactured by onsemi.
2 A Low-Voltage PMOS-NMOS Bridge Driver
Description The FAN3268 dual 2 A gate driver is optimized to drive a high- side
P- channel MOSFET and a low- side N- channel MOSFET in motor control applications operating from a voltage rail up to 18 V. The driver has TTL input thresholds and provides buffer and level translation functions from logic inputs. Internal circuitry provides an under- voltage lockout function that prevents the output switching devices from operating if the VDD supply voltage is below the operating level. Internal 100 k W resistors bias the non- inverting output low and the inverting output to VDD to keep the external MOSFETs off during startup intervals when logic control signals may not be present.
The FAN3268 driver incorporates Miller Drivet architecture for the final output stage. This bipolar- MOSFET bination provides high current during the Miller plateau stage of the MOSFET turn- on / turn- off process to minimize switching loss, while providing rail- to- rail voltage swing and reverse current capability.
The FAN3268 has two independent enable pins that default to on if not connected. If the enable pin for non- inverting channel A is pulled low, OUTA is forced low; if the enable pin for inverting channel B is pulled low, OUTB is forced high. If an input is left unconnected, internal resistors bias the inputs such that the external MOSFETs are off.
Features
- 4.5 V to 18 V Operating Range
- Drives High- Side PMOS and Low- Side NMOS in Motor Control or
Buck Step- Down Applications
- Inverting Channel B Biases High- Side PMOS Device Off (with internal 100 k W Resistor) when VDD is below UVLO Threshold
- TTL Input Thresholds
- 2.4 A Sink / 1.6 A Source at VOUT = 6 V
- Internal Resistors Turn Driver Off If No Inputs
- Miller Drive Technology
- 8- Lead SOIC Package
- Rated from
- 40°C to +125°C Ambient
- AEC- Q100 Qualified and PPAP Capable
- This is a Pb- Free Device
Applications
- Motor Control with PMOS / NMOS Half- Bridge Configuration
- Buck...