Description
This N.
Channel logic level enhancement mode field effect
transistor is produced using onsemi’s proprietary, high cell density, DMOS technology.This very high density process is especially tailored to minimize on.
state resistance..
channel FET can replace several different digital transistors, with different bias.
Features
- 25 V, 0.22 A Continuous, 0.5 A Peak.
- RDS(on) = 5 W @ VGS = 2.7 V.
- RDS(on) = 4 W @ VGS = 4.5 V.
- Very Low Level Gate Drive Requirements Allowing Direct
Operation in 3 V Circuits. VGS(th) < 1.06 V.
- Replace Multiple NPN Digital Transistors with One DMOS FET.
- This Device is Pb.
- Free and Halide Free
Vcc
D
OUT
IN
G
S
GND
Figure 1. Inverter Application
DATA SHEET www. onsemi. com
D
G
S
SOT.
- 23 CASE 318.
- 08.
