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MC100LVELT22
Translator, Dual LVTTL / LVCMOS to Differential LVPECL
Description The MC100LVELT22 is a dual LVTTL/LVCMOS to differential
LVPECL translator. Due to LVPECL (Low Voltage Positive ECL) levels, only +3.3V and ground is required. The small 8−lead package outline with low skew dual gate design makes the MC100LVELT22 ideal for applications which require translation of a clock and/or data signal.
Features
• 350 ps Typical Propagation Delay • <100 ps Output−to−Output Skew • Flow Through Pinouts • The 100 Series Contains Temperature Compensation • LVPECL Operating Range: VCC = 3.15 V to 3.45 V
with GND = 0 V
• When Unused TTL Input is left Open, Q Output will Default High • These are Pb−Free Devices
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