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MC100E337 Datasheet

5V ECL 3Bit Scannable Registered Bus Transceiver

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MC10E337, MC100E337
5VĄECL 3ĆBit Scannable
Registered Bus Transceiver
The MC10E/100E337 is a 3-bit registered bus transceiver with scan.
The bus outputs (BUS0–BUS2) are specified for driving a 25 bus; the
receive outputs (Q0 – Q2) are specified for 50 . The bus outputs feature a
normal HIGH level (VOH) and a cutoff LOW level — when LOW, the
outputs go to – 2.0 V and the output emitter-follower is “off”, presenting a
high impedance to the bus. The bus outputs also feature edge slow-down
capacitors.
Both drive and receive sides feature the same logic, including a loopback
path to hold data. The HOLD/LOAD function is controlled by Transmit
Enable (TEN) and Receive Enable (REN) on the transmit and receive sides
respectively, with a HIGH selecting LOAD. Note that the implementation
of the E337 Receive Enable differs from that of the E336.
A synchronous bus enable (SBUSEN) is provided for normal, non-scan
operation. The asynchronous bus disable (ABUSDIS) disables the bus
immediately for scan mode.
The SYNCEN input is provided for flexibility when re-enabling the bus
after disabling with ABUSDIS, allowing either synchronous or
asynchronous re-enabling. An alternative use is asynchronous-only
operation with ABUSDIS, in which case SYNCEN is tied LOW, or left
open. SYNCEN is implemented as an overriding SET control
(active-LOW) to the enable flip-flop.
Scan mode is selected by a HIGH at the SCAN input. Scan input data is
shifted in through S_IN and output data appears at the Q2 output.
All registers are clocked on the positive transition of CLK. Additional
lead-frame grounding is provided through the Ground pins (GND) which
should be connected to 0V. The GND pins are not electrically connected to
the chip.
The 100 Series contains temperature compensation.
Scannable Version of E336
25 Cutoff Bus Outputs
50 Receiver Outputs
Scannable Registers
Sync. and Async. Bus Enables
Non-inverting Data Path
1500 ps Max. Clock to Bus (Data Transmit)
1000 ps Max. Clock to Q (Data Receive)
Bus Outputs Feature Internal Edge Slow-Down Capacitors
Additional Package Ground Pins
PECL Mode Operating Range: VCC= 4.2 V to 5.7 V with VEE= 0 V
NECL Mode Operating Range: VCC= 0 V with VEE= –4.2 V to –5.7 V
Internal Input Pulldown Resistors
ESD Protection: > 1 KV HBM, > 75 V MM
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL–94 code V–0 @ 1/8”,
Oxygen Index 28 to 34
Transistor Count = 471 devices
http://onsemi.com
MARKING
DIAGRAMS
MC10E337FN
AWLYYWW
PLCC–28
FN SUFFIX
CASE 776
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
28 1
MC100E337FN
AWLYYWW
28 1
ORDERING INFORMATION
Device
Package
Shipping
MC10E337FN
PLCC–28 37 Units/Rail
MC10E337FNR2 PLCC–28 500 Units/Reel
MC100E337FN
PLCC–28 37 Units/Rail
MC100E337FNR2 PLCC–28 500 Units/Reel
© Semiconductor Components Industries, LLC, 2000
October, 2000 – Rev. 3
1
Publication Order Number:
MC10E337/D


  ON Semiconductor Electronic Components Datasheet  

MC100E337 Datasheet

5V ECL 3Bit Scannable Registered Bus Transceiver

No Preview Available !

MC10E337, MC100E337
PIN DESCRIPTION
PIN
A0 – A2
B0 – B2
S-IN
TEN, REN
SCAN
ABUSDIS
SBUSEN
SYNCEN
CLK
BUS0 – BUS2
Q0 – Q2
FUNCTION
ECL Data Inputs A
ECL Data Inputs B
ECL Serial (Scan) Data Input
HOLD/LOAD Controls
ECL Scan Control
ECL Asynchronous Bus Disable
ECL Synchronous Bus Enable
ECL Synchronous Enable Control
ECL Clock
ECL 25Cutoff Bus Outputs
ECL Receive Data Outputs
(Q2 serves as SCAN_OUT in scan mode)
VCC, VCCO
VEE
GND
Positive Supply
Negative Supply
Ground
LOGIC DIAGRAM AND PINOUT ASSIGNMENT
SBUSEN SYNCENB0 A0 ABUSDISVCCO Q0
25 24 23 22 21 20 19
SCAN 26
18 GND
S-IN 27
17 BUS0
TEN 28
VEE 1
REN 2
CLK 3
Pinout: 28-Lead PLCC
(Top View)
16 VCC
15 Q1
14 VCCO
13 BUS1
A1 4
12 GND
5 6 7 8 9 10 11
B1 A2 B2 VCCO BUS2 GND Q2
* All VCC and VCCO pins are tied together on the die.
Warning: All VCC, VCCO, and VEE pins must be externally
connected to Power Supply to guarantee proper operation.
AB22
AB11
AB00
S_IN
TEN
REN
SCAN
ABUSDIS
SBUSEN
SYNCEN
CLK
LOGIC DIAGRAM
DQ
DQ
DQ
BUS2
D Q Q2/
SCAN_OUT
BUS1
D Q Q1
BUS0
D Q Q0
DQ
SET
http://onsemi.com
2


Part Number MC100E337
Description 5V ECL 3Bit Scannable Registered Bus Transceiver
Maker ON Semiconductor
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