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MC100EP446 Datasheet

3.3 V/5 V 8-Bit CMOS/ECL/TTL Data Input Parallel/Serial Converter

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MC100EP446 pdf
MC10EP446, MC100EP446
3.3 V/5 V 8‐Bit
CMOS/ECL/TTL Data Input
Parallel/Serial Converter
Description
The MC10/100EP446 is an integrated 8−bit parallel to serial data
converter. The device is designed with unique circuit topology to
operate for NRZ data rates up to 3.2 Gb/s. The conversion sequence
from parallel data into a serial data stream is from bit D0 to D7. The
parallel input pins D0−D7 are configurable to be threshold controlled by
CMOS, ECL, or TTL level signals. The serial data rate output can be
selected at internal clock data rate or twice the internal clock data rate
using the CKSEL pin.
Control pins are provided to reset (SYNC) and disable internal clock
circuitry (CKEN). In either CKSEL modes, the internal flip−flops are
triggered on the rising edge for CLK and the multiplexers are switched
on the falling edge of CLK, therefore, all associated specification
limits are referenced to the negative edge of the clock input.
Additionally, VBB pin is provided for single−ended input condition.
The 100 Series devices contain temperature compensation network.
Features
3.2 Gb/s Typical Data Rate Capability
Differential Clock and Serial Outputs
VBB Output for Single-ended Input Applications
Asynchronous Data Reset (SYNC)
PECL Mode Operating Range:
VCC = 3.0 V to 5.5 V with VEE = 0 V
NECL Mode Operating Range:
VCC = 0 V with VEE = −3.0 V to −5.5 V
Open Input Default State
Safety Clamp on Inputs
Parallel Interface Can Support PECL, TTL or CMOS
These Devices are Pb−Free and are RoHS Compliant
http://onsemi.com
MARKING
DIAGRAM*
LQFP−32
FA SUFFIX
CASE 873A
MCxxx
EP446
AWLYYWWG
1 32
QFN32
MN SUFFIX
CASE 488AM
1
MCxxx
EP446
AWLYYWWG
G
xxx = 10 or 100
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 18 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
June, 2014 − Rev. 11
1
Publication Order Number:
MC10EP446/D


  ON Semiconductor Electronic Components Datasheet  

MC100EP446 Datasheet

3.3 V/5 V 8-Bit CMOS/ECL/TTL Data Input Parallel/Serial Converter

No Preview Available !

MC100EP446 pdf
MC10EP446, MC100EP446
VCC
VCF
VEF
VEE
SYNC
SYNC
VBB2
VCC
24 23 22 21 20 19 18 17
25 16
26 15
27 14
28
MC10EP446
13
MC100EP446
29 12
30 11
31 10
32 9
12345678
24 23 22 21 20 19 18 17
VEE
VCC 25
PCLK VCF 26
16 VEE
15 PCLK
PCLK VEF 27
14 PCLK
VCC VEE 28
SOUT SYNC 29
Exposed Pad (EP)
13 VCC
12 SOUT
SOUT SYNC 30
11 SOUT
VCC VBB2 31
10 VCC
VCC VCC 32
9 VCC
12345 678
Warning: All VCC and VEE pins must be externally connected
to Power Supply to guarantee proper operation.
Figure 1. LQFP−32 Pinout (Top View)
Figure 2. QFN−32 Pinout (Top View)
Table 1. PIN DESCRIPTION
PIN FUNCTION
D0*−D7*
ECL, CMOS, or TTL Parallel Data Input
SOUT, SOUT
CLK*, CLK*
ECL Differential Serial Data Output
ECL Differential Clock Input
PCLK, PCLK
ECL Differential Parallel Clock Output
SYNC*, SYNC**
ECL Conversion Synchronizing Differential Input (Reset)***
CKSEL*
ECL Clock Input Selector
CKEN*, CKEN*
ECL Clock Enable Differential Input
VCF ECL, CMOS, or TTL Input Selector
VEF ECL Reference Mode Connection
VBB1, VBB2
Reference Voltage Output
VCC Positive Supply
VEE Negative Supply
* Pins will default LOW when left open.
**Pins will default HIGH when left open.
***The rising edge of SYNC will asynchronously reset the internal circuitry. The falling edge of the SYNC followed by the falling edge of CLK
initiates the conversion process synchronously on the next rising edge of CLK.
http://onsemi.com
2


Part Number MC100EP446
Description 3.3 V/5 V 8-Bit CMOS/ECL/TTL Data Input Parallel/Serial Converter
Maker ON Semiconductor
Total Page 20 Pages
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