MC100H602 translator equivalent, 9-bit latch ttl/ecl translator.
D−type latches. Latching is controlled by Latch Enable (LEN), while the Master Reset input resets the latches. A post−latch logic enable is also provided (ENECL), allowin.
* Flow−Through Configuration
* Extra TTL and ECL Power/Ground Pins to Minimize
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Switching.
The MC10H/100H602 is a 9−bit, dual supply TTL to ECL translator with latch. Devices in the ON Semiconductor 9−bit translator series utilize the PLCC−28 for optimal power pinning, signal flow−through and electrical performance. The H602 features D−ty.
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