MC10E137 counter equivalent, 5v?ecl 8?bit ripple counter.
XORed enable inputs, EN1 and EN2, which are synchronous to the CLK input. When only one synchronous enable is asserted the counter becomes disabled on the next CLK transi.
The asynchronous enable input, A_Start, when asserted enables the counter while overriding any synchronous enable signa.
The MC10E137 is a very high speed binary ripple counter. The two least significant bits were designed with very fast edge rates while the more significant bits maintain standard ECLinPS™ output edge rates. This allows the counter to operate at very h.
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?ECL ?Bit
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