9−Bit Latch ECL to TTL
The MC10H/100H603 is a 9−bit, dual supply ECL to TTL
translator. Devices in the ON Semiconductor 9−bit translator series
utilize the 28−lead PLCC for optimal power pinning, signal
flow−through and electrical performance.
The devices feature a 48 mA TTL output stage, and AC
performance is specified into both a 50 pF and 200 pF load
capacitance. Latching is controlled by Latch Enable (LEN), and
Master Reset (MR) resets the latches. A HIGH on OEECL sends the
outputs into the high impedance state. All control inputs are ECL
The 10H version is compatible with MECL 10Ht ECL logic levels.
The 100H version is compatible with 100K levels.
• 9−Bit Ideal for Byte−Parity Applications
• 3−State TTL Outputs
• Flow−Through Configuration
• Extra TTL and ECL Power Pins to Minimize Switching Noise
• Dual Supply
• 6.0 ns Max Delay into 50 pF, 12 ns into 200 pF
(all Outputs Switching)
• PNP TTL Inputs for Low Loading
• Pb−Free Packages are Available*
xxx = 10 or 100
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
November, 2006 − Rev. 10
Publication Order Number: