hex d flip-flop.
where the true output only is required and the Clock and Master Reset are common to all storage elements.
D2 D1 D0
D CP.
The MC74AC174/74ACT174 consists of six edge−triggered D flip−flops with individual D inputs and Q outputs. The Clock (CP) and Master Reset (MR) are common to all flip−flops. Each D input’s state is transferred to the corresponding flip−flop’s output .
Image gallery
TAGS
Download (Size : 251.71KB)